Inventor · disambiguated record
Barry S. Burns
Also filed as: BURNS BARRY S · BURNS BARRY SCOTT
10 granted patents·1 pending application·435 citations·filing 2000–2008
92Inventor score
Top patents by PatentIndex Score
11 records- 0194US6847645B1Method and apparatus for controlling packet header buffer wrap around in a forwarding engine of an intermediate network nodeCISCO TECH IND·Filed 2001·Granted Jan 25, 2005·124 cites·23 claims
- 0292US7100021B1Barrier synchronization mechanism for processors of a systolic arrayCISCO TECH INC·Filed 2001·Granted Aug 29, 2006·86 cites·80 claims
- 0391US7856512B2System and method for offloading a processor tasked with calendar processingCISCO TECH INC·Filed 2005·Granted Dec 21, 2010·41 cites·14 claims
- 0491US7069268B1System and method for identifying data using parallel hashingCISCO TECH INC·Filed 2003·Granted Jun 27, 2006·94 cites·18 claims
- 0583US6757298B1VLAN trunking over ATM PVCs (VTAP)CISCO TECH IND·Filed 2000·Granted Jun 29, 2004·41 cites·20 claims
- 0678US7564790B2Method and system for shaping traffic in a parallel queuing hierarchyCISCO TECH INC·Filed 2005·Granted Jul 21, 2009·10 cites·18 claims
- 0774US7739426B1Descriptor transfer logicCISCO TECH INC·Filed 2006·Granted Jun 15, 2010·6 cites·20 claims
- 0866US6986022B1Boundary synchronization mechanism for a processor of a systolic arrayCISCO TECH IND·Filed 2001·Granted Jan 10, 2006·11 cites·20 claims
- 0965US6895013B1Coherent access to and update of configuration information in multiprocessor environmentCISCO TECH IND·Filed 2001·Granted May 17, 2005·17 cites·28 claims
- 1055US8112584B1Storage controller performing a set of multiple operations on cached data with a no-miss guarantee until all of the operations are completeWILLIAMS JR JOHN J·Filed 2004·Granted Feb 7, 2012·5 cites·43 claims
- 1146US2009271570A1Content-Addressable Memory Lookup Operations with Error DetectionCISCO TECH INC·Filed 2008·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →