Inventor · disambiguated record
Konstantin Bourdelle
Also filed as: BOURDELLE KONSTANTIN · BOURDELLE KONSTANTIN K
24 granted patents·3 pending applications·175 citations·filing 1998–2013
95Inventor score
Files withSOITEC SILICON ON INSULATOR14BOURDELLE KONSTANTIN4DAVAL NICOLAS2AGERE SYST GUARDIAN CORP1AGERE SYSTEMS INC1
Top patents by PatentIndex Score
27 records- 0190US7449394B2Atomic implantation and thermal treatment of a semiconductor layerSOITEC SILICON ON INSULATOR·Filed 2005·Granted Nov 11, 2008·20 cites·19 claims
- 0289US7229898B2Methods for fabricating a germanium on insulator waferSOITEC SILICON ON INSULATOR·Filed 2005·Granted Jun 12, 2007·19 cites·20 claims
- 0388US8058158B2Hybrid semiconductor substrate including semiconductor-on-insulator region and method of making the sameBOURDELLE KONSTANTIN·Filed 2010·Granted Nov 15, 2011·10 cites·18 claims
- 0487US7670929B2Method for direct bonding two semiconductor substratesSOITEC SILICON ON INSULATOR·Filed 2007·Granted Mar 2, 2010·12 cites·18 claims
- 0586US7575988B2Method of fabricating a hybrid substrateSOITEC SILICON ON INSULATOR·Filed 2007·Granted Aug 18, 2009·14 cites·13 claims
- 0685US7387947B2Method for transferring a thin layer including a controlled disturbance of a crystalline structureSOITEC SILICON ON INSULATOR·Filed 2005·Granted Jun 17, 2008·14 cites·20 claims
- 0782US8241942B2Method of fabricating a back-illuminated image sensorBOURDELLE KONSTANTIN·Filed 2009·Granted Aug 14, 2012·6 cites·19 claims
- 0878US9035474B2Method for manufacturing a semiconductor substrateMAZURE CARLOS·Filed 2010·Granted May 19, 2015·4 cites·15 claims
- 0974US8309426B2Methods for manufacturing multilayer wafers with trench structuresBOURDELLE KONSTANTIN·Filed 2011·Granted Nov 13, 2012·3 cites·17 claims
- 1074US7799651B2Method of treating interface defects in a substrateSOITEC SILICON ON INSULATOR·Filed 2008·Granted Sep 21, 2010·4 cites·18 claims
- 1172US8263475B2Method for manufacturing heterostructuresRADU IONUT·Filed 2009·Granted Sep 11, 2012·4 cites·17 claims
- 1269US7645486B2Method of manufacturing a silicon dioxide layerSOITEC SILICON ON INSULATOR·Filed 2007·Granted Jan 12, 2010·3 cites·20 claims
- 1367US7833877B2Method for producing a semiconductor substrateSOITEC SILICON ON INSULATOR·Filed 2007·Granted Nov 16, 2010·2 cites·20 claims
- 1467US7572331B2Method of manufacturing a waferSOITEC SILICON ON INSULATOR·Filed 2006·Granted Aug 11, 2009·2 cites·22 claims
- 1565US6306780B1Method for making a photoresist layer having increased resistance to blistering, peeling, lifting, or reticulationAGERE SYST GUARDIAN CORP·Filed 2000·Granted Oct 23, 2001·9 cites·45 claims
- 1664US8309431B2Method for self-supported transfer of a fine layer by pulsation after implantation or co-implantationNGUYEN NGUYET-PHUONG·Filed 2004·Granted Nov 13, 2012·16 cites·31 claims
- 1762US7767545B2Substrate production method and substrate including amorphization and recrystallizing a top regionSOITEC SILICON ON INSULATOR·Filed 2006·Granted Aug 3, 2010·1 cites·20 claims
- 1860US6136672AProcess for device fabrication using a high-energy boron implantLUCENT TECHNOLOGIES INC·Filed 1998·Granted Oct 24, 2000·24 cites·4 claims
- 1958US7871900B2Quality of a thin layer through high-temperature thermal annealingSOITEC SILICON ON INSULATOR·Filed 2007·Granted Jan 18, 2011·1 cites·20 claims
- 2052US9275892B2Method of high temperature layer transferDAIX NICOLAS·Filed 2011·Granted Mar 1, 2016·2 cites·20 claims
- 2151US6930006B2Electronic circuit structure with improved dielectric propertiesAGERE SYSTEMS INC·Filed 2002·Granted Aug 16, 2005·3 cites·6 claims
- 2249US7407548B2Method of manufacturing a waferSOITEC SILICON ON INSULATOR·Filed 2004·Granted Aug 5, 2008·2 cites·20 claims
- 2342US2011165758A1Method for making a structure comprising a step for implanting ions in order to stabilize the adhesive bonding interfaceBOURDELLE KONSTANTIN·Filed 2009·Application pending·0 cites
- 2441US9018678B2Method for forming a Ge on III/V-on-insulator structureDAVAL NICOLAS·Filed 2012·Granted Apr 28, 2015·0 cites·13 claims
- 2541US2014284768A1Semiconductor on insulator structure with improved electrical characteristicsSOITEC SILICON ON INSULATOR·Filed 2012·Application pending·0 cites
- 2640US9698063B2Method of testing a semiconductor-on-insulator structure and application of said test to the fabrication of such a structureSOITEC SILICON ON INSULATOR·Filed 2013·Granted Jul 4, 2017·0 cites·18 claims
- 2737US2006014363A1Thermal treatment of a semiconductor layerDAVAL NICOLAS·Filed 2005·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →