Inventor · disambiguated record
Luigi Ternullo, Jr.
Also filed as: TERNULLO JR LUIGI · TERNULLO LUIGI JR
29 granted patents·1,217 citations·filing 1994–2000
98Inventor score
Top patents by PatentIndex Score
29 records- 0196US6061296AMultiple data clock activation with programmable delay for use in multiple CAS latency memory devicesVANGUARD INT SEMICONDUCT CORP·Filed 1998·Granted May 9, 2000·280 cites·31 claims
- 0295US5535164ABIST tester for multiple memoriesIBM·Filed 1995·Granted Jul 9, 1996·149 cites·18 claims
- 0393US5553082ABuilt-in self-test for logic circuitry at memory array outputIBM·Filed 1995·Granted Sep 3, 1996·115 cites·22 claims
- 0492US5796745AMemory array built-in self test circuit for testing multi-port memory arraysIBM·Filed 1996·Granted Aug 18, 1998·105 cites·20 claims
- 0587US6246619B1Self-refresh test time reduction schemeVANGUARD INT SEMICONDUCT CORP·Filed 2000·Granted Jun 12, 2001·57 cites·21 claims
- 0687US6111447ATiming circuit that selectively triggers on a rising or falling input signal edgeVANGUARD INT SEMICONDUCT CORP·Filed 1998·Granted Aug 29, 2000·58 cites·20 claims
- 0782US5784323ATest converage of embedded memories on semiconductor substratesIBM·Filed 1997·Granted Jul 21, 1998·50 cites·17 claims
- 0878US5582703AMethod of fabricating an ultra-high resolution three-color screenPALOMAR TECHN CORP·Filed 1994·Granted Dec 10, 1996·31 cites·20 claims
- 0977US5954830AMethod and apparatus for achieving higher performance data compression in ABIST testing by reducing the number of data outputsIBM·Filed 1997·Granted Sep 21, 1999·39 cites·20 claims
- 1077US5670812AField effect transistor having contact layer of transistor gate electrode materialIBM·Filed 1995·Granted Sep 23, 1997·42 cites·21 claims
- 1172US5996097ATesting logic associated with numerous memory cells in the word or bit dimension in parallelIBM·Filed 1997·Granted Nov 30, 1999·31 cites·14 claims
- 1269US5790564AMemory array built-in self-test circuit having a programmable pattern generator for allowing unique read/write operations to adjacent memory cells, and method thereforIBM·Filed 1995·Granted Aug 4, 1998·25 cites·3 claims
- 1369US5563833AUsing one memory to supply addresses to an associated memory during testingIBM·Filed 1995·Granted Oct 8, 1996·23 cites·17 claims
- 1465US6052328AHigh-speed synchronous write control schemeVANGUARD INT SEMICONDUCT CORP·Filed 1997·Granted Apr 18, 2000·24 cites·26 claims
- 1563US5744384ASemiconductor structures which incorporate thin film transistorsIBM·Filed 1996·Granted Apr 28, 1998·21 cites·7 claims
- 1662US6208197B1Internal charge pump voltage limit controlVANGUARD INT SEMICONDUCT CORP·Filed 1999·Granted Mar 27, 2001·29 cites·31 claims
- 1760US6016072ARegulator system for an on-chip supply voltage generatorVANGUARD INT SEMICONDUCT CORP·Filed 1998·Granted Jan 18, 2000·26 cites·29 claims
- 1859US5757050AField effect transistor having contact layer of transistor gate electrode materialIBM·Filed 1997·Granted May 26, 1998·18 cites·6 claims
- 1958US6327215B1Local bit switch decode circuit and methodVANGUARD INT SEMICONDUCT CORP·Filed 2000·Granted Dec 4, 2001·10 cites·28 claims
- 2052US5771242AMemory array built-in self-test circuit having a programmable pattern generator for allowing unique read/write operations to adjacent memory cells, and method thereforIBM·Filed 1996·Granted Jun 23, 1998·12 cites·12 claims
- 2149US5761213AMethod and apparatus to determine erroneous value in memory cells using data compressionIBM·Filed 1996·Granted Jun 2, 1998·11 cites·17 claims
- 2249US5539753AMethod and apparatus for output deselecting of data during testIBM·Filed 1995·Granted Jul 23, 1996·15 cites·17 claims
- 2348US6060873AOn-chip-generated supply voltage regulator with power-up modeVANGUARD INT SEMICONDUCT CORP·Filed 1999·Granted May 9, 2000·11 cites·33 claims
- 2446US5745498ARapid compare of two binary numbersIBM·Filed 1996·Granted Apr 28, 1998·8 cites·25 claims
- 2538US5796665ASemiconductor memory device with improved read signal generation of data lines and assisted precharge to mid-levelVANGUARD INT SEMICONDUCT CORP·Filed 1997·Granted Aug 18, 1998·5 cites·30 claims
- 2637US6353903B1Method and apparatus for testing differential signalsIBM·Filed 1994·Granted Mar 5, 2002·6 cites·11 claims
- 2737US5973895AMethod and circuit for disabling a two-phase charge pumpVANGUARD INT SEMICONDUCT CORP·Filed 1998·Granted Oct 26, 1999·7 cites·22 claims
- 2836US7102421B1Dynamically adjustable on-chip supply voltage generationVANGUARD INT SEMICONDUCT CORP·Filed 1998·Granted Sep 5, 2006·5 cites·24 claims
- 2936US6133748ACrow-bar current reduction circuitVANGUARD INT SEMICONDUCT CORP·Filed 1998·Granted Oct 17, 2000·4 cites·26 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →