Inventor · disambiguated record
Abhishek Venkatesh
Also filed as: VENKATESH ABHISHEK
54 granted patents·7 pending applications·61 citations·filing 2013–2024
97Inventor score
Files withINTEL CORP61
Top patents by PatentIndex Score
61 records- 0196US11869119B2Controlling coarse pixel size from a stencil bufferINTEL CORP·Filed 2022·Granted Jan 9, 2024·2 cites·24 claims
- 0294US11062506B2Tile-based immediate mode rendering with early hierarchical-zINTEL CORP·Filed 2020·Granted Jul 13, 2021·3 cites·24 claims
- 0394US10235735B2Graphics processor with tiled compute kernelsINTEL CORP·Filed 2017·Granted Mar 19, 2019·15 cites·21 claims
- 0492US10861126B1Asynchronous execution mechanismINTEL CORP·Filed 2019·Granted Dec 8, 2020·5 cites·20 claims
- 0590US10109078B1Controlling coarse pixel size from a stencil bufferINTEL CORP·Filed 2017·Granted Oct 23, 2018·5 cites·24 claims
- 0689US10783603B2Graphics processor with tiled compute kernelsINTEL CORP·Filed 2019·Granted Sep 22, 2020·5 cites·5 claims
- 0785US12243125B2Controlling coarse pixel size from a stencil bufferINTEL CORP·Filed 2023·Granted Mar 4, 2025·0 cites·20 claims
- 0885US10796397B2Facilitating dynamic runtime transformation of graphics processing commands for improved graphics performance at computing devicesINTEL CORP·Filed 2015·Granted Oct 6, 2020·6 cites·20 claims
- 0983US11948017B2Thread modification to reduce command conversion latencyINTEL CORP·Filed 2020·Granted Apr 2, 2024·2 cites·21 claims
- 1081US10930060B2Conditional shader for graphicsINTEL CORP·Filed 2019·Granted Feb 23, 2021·2 cites·17 claims
- 1181US10643374B2Positional only shading pipeline (POSH) geometry data processing with coarse Z bufferINTEL CORP·Filed 2017·Granted May 5, 2020·3 cites·11 claims
- 1278US10733690B2GPU mixed primitive topology type processingINTEL CORP·Filed 2018·Granted Aug 4, 2020·2 cites·13 claims
- 1377US11663774B2Anti-aliasing adaptive shader with pixel tile coverage raster rule system, apparatus and methodINTEL CORP·Filed 2022·Granted May 30, 2023·0 cites·24 claims
- 1477US2024004713A1Hybrid low power homogenous grapics processing unitsINTEL CORP·Filed 2023·Application pending·0 cites
- 1576US12086705B2Compute optimization mechanism for deep neural networksINTEL CORP·Filed 2017·Granted Sep 10, 2024·3 cites·20 claims
- 1676US10706591B2Controlling coarse pixel size from a stencil bufferINTEL CORP·Filed 2018·Granted Jul 7, 2020·1 cites·20 claims
- 1775US11762696B2Hybrid low power homogenous grapics processing unitsINTEL CORP·Filed 2021·Granted Sep 19, 2023·0 cites·18 claims
- 1874US10163179B2Method and apparatus for intelligent cloud-based graphics updatesINTEL CORP·Filed 2015·Granted Dec 25, 2018·3 cites·23 claims
- 1974US2025053797A1Compute optimization mechanism for deep neural networksINTEL CORP·Filed 2024·Application pending·0 cites
- 2073US10964087B2Leveraging control surface fast clears to optimize 3D operationsINTEL CORP·Filed 2019·Granted Mar 30, 2021·1 cites·20 claims
- 2172US11302066B2Anti-aliasing adaptive shader with pixel tile coverage raster rule system, apparatus and methodINTEL CORP·Filed 2020·Granted Apr 12, 2022·0 cites·24 claims
- 2272US10522113B2Light field displays having synergistic data formatting, re-projection, foveation, tile binning and image warping technologyINTEL CORP·Filed 2017·Granted Dec 31, 2019·1 cites·43 claims
- 2371US11763515B2Leveraging control surface fast clears to optimize 3D operationsINTEL CORP·Filed 2021·Granted Sep 19, 2023·0 cites·17 claims
- 2471US11636567B2Mutli-frame rendererINTEL CORP·Filed 2021·Granted Apr 25, 2023·0 cites·20 claims
- 2571US11263720B2Frequent data value compression for graphics processing unitsINTEL CORP·Filed 2020·Granted Mar 1, 2022·0 cites·19 claims
- 2671US11244479B2Controlling coarse pixel size from a stencil bufferINTEL CORP·Filed 2020·Granted Feb 8, 2022·0 cites·24 claims
- 2770US11688366B2Light field displays having synergistic data formatting, re-projection, foveation, tile binning and image warping technologyINTEL CORP·Filed 2021·Granted Jun 27, 2023·0 cites·20 claims
- 2870US10242494B2Conditional shader for graphicsINTEL CORP·Filed 2017·Granted Mar 26, 2019·1 cites·10 claims
- 2968US11871142B2Synergistic temporal anti-aliasing and coarse pixel shading technologyINTEL CORP·Filed 2021·Granted Jan 9, 2024·0 cites·24 claims
- 3067US11494867B2Asynchronous execution mechanismINTEL CORP·Filed 2020·Granted Nov 8, 2022·0 cites·20 claims
- 3167US11169850B2Hybrid low power homogenous grapics processing unitsINTEL CORP·Filed 2019·Granted Nov 9, 2021·0 cites·18 claims
- 3266US11257182B2GPU mixed primitive topology type processingINTEL CORP·Filed 2020·Granted Feb 22, 2022·0 cites·16 claims
- 3366US2022067875A1Use of inner coverage information by a conservative rasterization pipeline to enable earlyz for conservative rasterizationINTEL CORP·Filed 2021·Application pending·0 cites
- 3464US11252370B2Synergistic temporal anti-aliasing and coarse pixel shading technologyINTEL CORP·Filed 2020·Granted Feb 15, 2022·0 cites·24 claims
- 3564US11107444B2Light field displays having synergistic data formatting, re-projection, foveation, tile binning and image warping technologyINTEL CORP·Filed 2019·Granted Aug 31, 2021·0 cites·24 claims
- 3664US10803656B2Anti-aliasing adaptive shader with pixel tile coverage raster rule system, apparatus and methodINTEL CORP·Filed 2019·Granted Oct 13, 2020·0 cites·6 claims
- 3763US11461959B2Positional only shading pipeline (POSH) geometry data processing with coarse Z bufferINTEL CORP·Filed 2020·Granted Oct 4, 2022·0 cites·24 claims
- 3863US11132759B2Mutli-frame rendererINTEL CORP·Filed 2019·Granted Sep 28, 2021·0 cites·24 claims
- 3963US10229468B2Automated conversion of GPGPU workloads to 3D pipeline workloadsINTEL CORP·Filed 2015·Granted Mar 12, 2019·1 cites·24 claims
- 4062US10748238B2Frequent data value compression for graphics processing unitsINTEL CORP·Filed 2019·Granted Aug 18, 2020·0 cites·32 claims
- 4162US10573066B2Anti-aliasing adaptive shader with pixel tile coverage raster rule system, apparatus and methodINTEL CORP·Filed 2018·Granted Feb 25, 2020·0 cites·17 claims
- 4261US11151683B2Use of inner coverage information by a conservative rasterization pipeline to enable EarlyZ for conservative rasterizationINTEL CORP·Filed 2019·Granted Oct 19, 2021·0 cites·19 claims
- 4361US2019251655A1Frequent Data Value Compression for Graphics Processing UnitsINTEL CORP·Filed 2019·Application pending·0 cites
- 4459US10867427B2Multi-resolution image plane rendering within an improved graphics processor microarchitectureINTEL CORP·Filed 2019·Granted Dec 15, 2020·0 cites·21 claims
- 4558US10192351B2Anti-aliasing adaptive shader with pixel tile coverage raster rule system, apparatus and methodINTEL CORP·Filed 2017·Granted Jan 29, 2019·0 cites·21 claims
- 4657US10728492B2Synergistic temporal anti-aliasing and coarse pixel shading technologyINTEL CORP·Filed 2017·Granted Jul 28, 2020·0 cites·13 claims
- 4757US10521271B2Hybrid low power homogenous grapics processing unitsINTEL CORP·Filed 2017·Granted Dec 31, 2019·0 cites·10 claims
- 4857US10445923B2Leveraging control surface fast clears to optimize 3D operationsINTEL CORP·Filed 2017·Granted Oct 15, 2019·0 cites·18 claims
- 4957US10262388B2Frequent data value compression for graphics processing unitsINTEL CORP·Filed 2017·Granted Apr 16, 2019·0 cites·32 claims
- 5057US10204394B2Multi-frame rendererINTEL CORP·Filed 2017·Granted Feb 12, 2019·0 cites·24 claims
Showing the top 50 of 61 patent records by PatentIndex Score.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →