Inventor · disambiguated record
Theodoros E. Anemikos
Also filed as: ANEMIKOS THEODOROS · ANEMIKOS THEODOROS E
13 granted patents·2 pending applications·90 citations·filing 2006–2018
91Inventor score
Top patents by PatentIndex Score
15 records- 0189US8421495B1Speed binning for dynamic and adaptive power controlANEMIKOS THEODOROS E·Filed 2011·Granted Apr 16, 2013·11 cites·24 claims
- 0286US8214651B2Radio frequency identification (RFID) based authentication system and methodologyANEMIKOS THEODOROS·Filed 2008·Granted Jul 3, 2012·17 cites·21 claims
- 0384US9310426B2On-going reliability monitoring of integrated circuit chips in the fieldIBM·Filed 2012·Granted Apr 12, 2016·6 cites·18 claims
- 0482US8176323B2Radio frequency identification (RFID) based authentication methodology using standard and private frequency RFID tagsANEMIKOS THEODOROS·Filed 2008·Granted May 8, 2012·11 cites·24 claims
- 0581US10067184B2Product performance test binningANEMIKOS THEODOROS·Filed 2011·Granted Sep 4, 2018·4 cites·22 claims
- 0681US7810054B2Method of optimizing power usage of an integrated circuit design by tuning selective voltage binning cut pointIBM·Filed 2008·Granted Oct 5, 2010·11 cites·6 claims
- 0778US7877714B2System and method to optimize semiconductor power by integration of physical design timing and product performance measurementsIBM·Filed 2008·Granted Jan 25, 2011·10 cites·7 claims
- 0876US7487487B1Design structure for monitoring cross chip delay variation on a semiconductor deviceIBM·Filed 2008·Granted Feb 3, 2009·8 cites·1 claims
- 0970US8097474B2Integrated circuit chip design flow methodology including insertion of on-chip or scribe line wireless process monitoring and feedback circuitryANEMIKOS THEODOROS·Filed 2008·Granted Jan 17, 2012·5 cites·20 claims
- 1063US8239811B2System and method for wireless and dynamic intra-process measurement of integrated circuit parametersANEMIKOS THEODOROS E·Filed 2008·Granted Aug 7, 2012·2 cites·20 claims
- 1162US10794952B2Product performance test binningIBM·Filed 2018·Granted Oct 6, 2020·0 cites·18 claims
- 1261US7521973B1Clock-skew tuning apparatus and methodIBM·Filed 2008·Granted Apr 21, 2009·4 cites·1 claims
- 1354US9429619B2Reliability test screen optimizationANEMIKOS THEODOROS E·Filed 2012·Granted Aug 30, 2016·1 cites·25 claims
- 1440US2009115447A1Design Structure for an Integrated Circuit Having State-Saving Input-Output Circuitry and a Method of Testing Such an Integrated CircuitIBM·Filed 2007·Application pending·0 cites
- 1538US2008129330A1Integrated Circuit Having State-Saving Input-Output Circuitry and a Method of Testing Such an Integrated CircuitIBM·Filed 2006·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →