Inventor · disambiguated record
Emilio Yero
Also filed as: YERO EMILIO · YERO EMILIO M · YERO EMILIO MIGUEL
35 granted patents·1 pending application·1,307 citations·filing 1991–2019
98Inventor score
Files withSGS THOMSON MICROELECTRONICS15SANDISK CORP6LEE DANA3SANDISK TECHNOLOGIES INC3ST MICROELECTRONICS SRL2
Top patents by PatentIndex Score
36 records- 0199US7869273B2Reducing the impact of interference during programmingSANDISK CORP·Filed 2007·Granted Jan 11, 2011·480 cites·49 claims
- 0298US7206230B2Use of data latches in cache operations of non-volatile memoriesSANDISK CORP·Filed 2005·Granted Apr 17, 2007·136 cites·7 claims
- 0397US10522489B1Manufacturing process for separating logic and memory arrayWESTERN DIGITAL TECH INC·Filed 2018·Granted Dec 31, 2019·23 cites·21 claims
- 0495US9715913B1Temperature code circuit with single ramp for calibration and determinationSANDISK TECHNOLOGIES LLC·Filed 2015·Granted Jul 25, 2017·23 cites·21 claims
- 0595US7467253B2Cycle count storage systemsSANDISK CORP·Filed 2006·Granted Dec 16, 2008·54 cites·18 claims
- 0694US7451264B2Cycle count storage methodsSANDISK CORP·Filed 2006·Granted Nov 11, 2008·38 cites·21 claims
- 0792US7577037B2Use of data latches in cache operations of non-volatile memoriesSANDISK CORP·Filed 2007·Granted Aug 18, 2009·16 cites·4 claims
- 0892US6396168B2Programmable logic arraysST MICROELECTRONICS SRL·Filed 2001·Granted May 28, 2002·55 cites·6 claims
- 0990US8180994B2Optimized page programming order for non-volatile memorySPROUSE STEVEN·Filed 2009·Granted May 15, 2012·22 cites·17 claims
- 1084US8184479B2Reducing the impact of interference during programmingLEE DANA·Filed 2011·Granted May 22, 2012·6 cites·20 claims
- 1183US5406141AHigh voltage CMOS switching circuitSGS THOMSON MICROELECTRONICS·Filed 1993·Granted Apr 11, 1995·40 cites·27 claims
- 1282US5889702ARead circuit for memory adapted to the measurement of leakage currentsSGS THOMSON MICROELECTRONICS·Filed 1998·Granted Mar 30, 1999·51 cites·10 claims
- 1381USRE45813EReducing the impact of interference during programmingSANDISK TECHNOLOGIES INC·Filed 2014·Granted Nov 24, 2015·4 cites·33 claims
- 1479US6418051B2Non-volatile memory device with configurable row redundancyST MICROELECTRONICS SRL·Filed 2001·Granted Jul 9, 2002·28 cites·20 claims
- 1579US5331599ADynamically switchable reference voltage generatorSGS THOMSON MICROELECTRONICS·Filed 1993·Granted Jul 19, 1994·36 cites·33 claims
- 1678US5859798ARead circuit for non-volatile memory working with a low supply voltageSGS THOMSON MICROELECTRONICS·Filed 1997·Granted Jan 12, 1999·42 cites·23 claims
- 1776US5699295ACurrent detection circuit for reading a memory in integrated circuit formSGS THOMSON MICROELECTRONICS·Filed 1996·Granted Dec 16, 1997·37 cites·21 claims
- 1875USRE45771EOptimized page programming order for non-volatile memorySANDISK TECHNOLOGIES INC·Filed 2014·Granted Oct 20, 2015·4 cites·22 claims
- 1975US7936602B2Use of data latches in cache operations of non-volatile memoriesSANDISK CORP·Filed 2009·Granted May 3, 2011·4 cites·12 claims
- 2073USRE43870EReducing the impact of interference during programmingLEE DANA·Filed 2011·Granted Dec 25, 2012·3 cites·49 claims
- 2169US5986937AMemory read circuit with precharging limitation deviceSGS THOMSON MICROELECTRONICS·Filed 1998·Granted Nov 16, 1999·28 cites·27 claims
- 2267US5544114AIntegrated circuit memory device with balancing circuit including following amplifier coupled to bit lineSGS THOMSON MICOROELECTRONICS·Filed 1995·Granted Aug 6, 1996·24 cites·6 claims
- 2365US6049497AElectrically modifiable multilevel non-volatile memory comprising internal refresh meansSGS THOMSON MICROELECTRONICS·Filed 1997·Granted Apr 11, 2000·23 cites·29 claims
- 2461US10930607B2Manufacturing process for separating logic and memory arrayWESTERN DIGITAL TECH INC·Filed 2019·Granted Feb 23, 2021·0 cites·18 claims
- 2559US8094492B2Reducing the impact of interference during programmingLEE DANA·Filed 2010·Granted Jan 10, 2012·1 cites·21 claims
- 2658US6140876ADifferential amplifier with MOS transistorST MICROELECTRONICS SA·Filed 1998·Granted Oct 31, 2000·17 cites·21 claims
- 2756US5923590ADevice for reading cells of a memorySGS THOMSON MICROELECTRONICS·Filed 1997·Granted Jul 13, 1999·16 cites·21 claims
- 2856US5303189AHigh-speed memory with a limiter of the drain voltage of the cellsSGS THOMSON MICROELECTRONICS·Filed 1991·Granted Apr 12, 1994·18 cites·31 claims
- 2954US5638332AIntegrated circuit memory device with balancing circuit including follower amplifier coupled to bit lineSGS THOMSON MICROELECTRONICS·Filed 1995·Granted Jun 10, 1997·11 cites·4 claims
- 3053US6038173AMemory read circuit with dynamically controlled precharging deviceSGS THOMSON MICROELECTRONICS·Filed 1998·Granted Mar 14, 2000·14 cites·17 claims
- 3149US5581511AIntegrated circuit memory device with balancing circuit including follower amplifier coupled to bit lineSGS THOMSON MICROELECTONICS S·Filed 1993·Granted Dec 3, 1996·11 cites·11 claims
- 3248US2016124664A1Block Level Local Column Redundancy Methods for Higher YieldSANDISK TECHNOLOGIES INC·Filed 2014·Application pending·0 cites
- 3347US5469382ADevice for detecting the contents of cells within a memory, especially an EPROM memory, method implemented with this device, and memory provided with this deviceSGS THOMSON MICROELECTRONICS·Filed 1992·Granted Nov 21, 1995·11 cites·13 claims
- 3446US5412602ADevice for generating a voltage for programming a programmable permanent memory, especially of EPROM type, method and memory relating theretoSGS THOMSON MICROELECTRONICS·Filed 1992·Granted May 2, 1995·10 cites·15 claims
- 3544US5969961ALoad pump type of voltage generator circuitSGS THOMSON MICROELECTRONICS·Filed 1998·Granted Oct 19, 1999·12 cites·13 claims
- 3644US5675539AMethod and circuit for testing memories in integrated circuit formSGS THOMSON MICROELECTRONICS·Filed 1995·Granted Oct 7, 1997·9 cites·22 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →