Inventor · disambiguated record
Pandi C. Marimuthu
Also filed as: MARIMUTHU PANDI C · MARIMUTHU PANDI CHELVAM
102 granted patents·5 pending applications·1,236 citations·filing 2004–2022
99Inventor score
Files withSTATS CHIPPAC LTD48STATS CHIPPAC PTE LTD25LIN YAOJIAN11CHOI WON KYOUNG4MARIMUTHU PANDI CHELVAM3
Top patents by PatentIndex Score
107 records- 0198US9443797B2Semiconductor device having wire studs as vertical interconnect in FO-WLPSTATS CHIPPAC LTD·Filed 2013·Granted Sep 13, 2016·55 cites·16 claims
- 0298US8810024B2Semiconductor method and device of forming a fan-out PoP device with PWB vertical interconnect unitsLIN YAOJIAN·Filed 2012·Granted Aug 19, 2014·62 cites·32 claims
- 0398US7838337B2Semiconductor device and method of forming an interposer package with through silicon viasSTATS CHIPPAC LTD·Filed 2008·Granted Nov 23, 2010·166 cites·20 claims
- 0497US9842798B2Semiconductor device and method of forming a PoP device with embedded vertical interconnect unitsSTATS CHIPPAC LTD·Filed 2013·Granted Dec 12, 2017·31 cites·6 claims
- 0597US9224647B2Semiconductor device and method of forming TSV interposer with semiconductor die and build-up interconnect structure on opposing surfaces of the interposerKOO JUN MO·Filed 2011·Granted Dec 29, 2015·109 cites·14 claims
- 0697US8993377B2Semiconductor device and method of bonding different size semiconductor die at the wafer levelKOO JUN MO·Filed 2011·Granted Mar 31, 2015·70 cites·28 claims
- 0797US8263439B2Semiconductor device and method of forming an interposer package with through silicon viasMARIMUTHU PANDI CHELVAM·Filed 2010·Granted Sep 11, 2012·91 cites·31 claims
- 0897US8258012B2Semiconductor device and method of forming discontinuous ESD protection layers between semiconductor diePAGAILA REZA A·Filed 2010·Granted Sep 4, 2012·25 cites·25 claims
- 0997US7741148B1Semiconductor device and method of forming an interconnect structure for 3-D devices using encapsulant for structural supportSTATS CHIPPAC LTD·Filed 2008·Granted Jun 22, 2010·57 cites·17 claims
- 1096US12094729B2Semiconductor device with encapsulant deposited along sides and surface edge of semiconductor die in embedded WLCSPSTATS CHIPPAC PTE LTD·Filed 2021·Granted Sep 17, 2024·2 cites·22 claims
- 1196US11024561B2Semiconductor device and method of forming a fan-out PoP device with PWB vertical interconnect unitsSTATS CHIPPAC PTE LTD·Filed 2020·Granted Jun 1, 2021·3 cites·25 claims
- 1296US10049964B2Semiconductor device and method of forming a fan-out PoP device with PWB vertical interconnect unitsSTATS CHIPPAC LTD·Filed 2013·Granted Aug 14, 2018·21 cites·22 claims
- 1396US8435881B2Semiconductor device and method of forming protective coating over interconnect structure to inhibit surface oxidationCHOI WON KYOUNG·Filed 2011·Granted May 7, 2013·33 cites·30 claims
- 1496US8017515B2Semiconductor device and method of forming compliant polymer layer between UBM and conformal dielectric layer/RDL for stress reliefSTATS CHIPPAC LTD·Filed 2008·Granted Sep 13, 2011·49 cites·24 claims
- 1594US10453785B2Semiconductor device and method of forming double-sided fan-out wafer level packageSTATS CHIPPAC LTD·Filed 2015·Granted Oct 22, 2019·14 cites·25 claims
- 1694US9704824B2Semiconductor device and method of forming embedded wafer level chip scale packagesSTATS CHIPPAC LTD·Filed 2013·Granted Jul 11, 2017·10 cites·5 claims
- 1794US9318404B2Semiconductor device and method of forming stress relieving vias for improved fan-out WLCSP packageSTATS CHIPPAC LTD·Filed 2013·Granted Apr 19, 2016·19 cites·21 claims
- 1894US8456002B2Semiconductor device and method of forming insulating layer disposed over the semiconductor die for stress reliefLIN YAOJIAN·Filed 2011·Granted Jun 4, 2013·13 cites·25 claims
- 1993US11488933B2Semiconductor device and method of forming embedded wafer level chip scale packagesSTATS CHIPPAC PTE LTD·Filed 2020·Granted Nov 1, 2022·2 cites·24 claims
- 2093US9837303B2Semiconductor method and device of forming a fan-out device with PWB vertical interconnect unitsSTATS CHIPPAC LTD·Filed 2013·Granted Dec 5, 2017·16 cites·23 claims
- 2193US9704780B2Semiconductor device and method of forming low profile fan-out package with vertical interconnection unitsSTATS CHIPPAC LTD·Filed 2013·Granted Jul 11, 2017·14 cites·29 claims
- 2293US8890315B2Semiconductor device and method of forming interconnect structure over seed layer on contact pad of semiconductor die without undercutting seed layer beneath interconnect structureSTATS CHIPPAC LTD·Filed 2013·Granted Nov 18, 2014·10 cites·25 claims
- 2393US8659162B2Semiconductor device having an interconnect structure with TSV using encapsulant for structural supportSUTHIWONGSUNTHORN NATHAPONG·Filed 2011·Granted Feb 25, 2014·19 cites·25 claims
- 2493US8067308B2Semiconductor device and method of forming an interconnect structure with TSV using encapsulant for structural supportSUTHIWONGSUNTHORN NATHAPONG·Filed 2009·Granted Nov 29, 2011·28 cites·27 claims
- 2592US9978665B2Semiconductor device and method of forming low profile fan-out package with vertical interconnection unitsSTATS CHIPPAC PTE LTD·Filed 2017·Granted May 22, 2018·7 cites·25 claims
- 2692US9754897B2Semiconductor device and method of forming electromagnetic (EM) shielding for LC circuitsSTATS CHIPPAC LTD·Filed 2015·Granted Sep 5, 2017·8 cites·20 claims
- 2792US9293401B2Semiconductor device and method for forming a low profile embedded wafer level ball grid array molded laser package (EWLP-MLP)STATS CHIPPAC LTD·Filed 2013·Granted Mar 22, 2016·11 cites·22 claims
- 2892US9202769B2Semiconductor device and method of forming thermal lid for balancing warpage and thermal managementSTATS CHIPPAC LTD·Filed 2014·Granted Dec 1, 2015·12 cites·21 claims
- 2992US8912650B2Semiconductor device and method of forming protective coating over interconnect structure to inhibit surface oxidationSTATS CHIPPAC LTD·Filed 2013·Granted Dec 16, 2014·11 cites·21 claims
- 3091US10388612B2Semiconductor device and method of forming electromagnetic (EM) shielding for LC circuitsSTATS CHIPPAC PTE LTD·Filed 2017·Granted Aug 20, 2019·6 cites·21 claims
- 3191US9721922B2Semiconductor device and method of forming fine pitch RDL over semiconductor die in fan-out packageSTATS CHIPPAC LTD·Filed 2013·Granted Aug 1, 2017·11 cites·23 claims
- 3291US9607958B2Semiconductor device and method for forming openings and trenches in insulating layer by first LDA and second LDA for RDL formationSTATS CHIPPAC LTD·Filed 2014·Granted Mar 28, 2017·10 cites·19 claims
- 3390US10446523B2Semiconductor device and method of forming wire studs as vertical interconnect in FO-WLPSTATS CHIPPAC PTE LTD·Filed 2016·Granted Oct 15, 2019·5 cites·25 claims
- 3490US9865525B2Semiconductor method and device of forming a fan-out PoP device with PWB vertical interconnect unitsSTATS CHIPPAC LTD·Filed 2014·Granted Jan 9, 2018·9 cites·25 claims
- 3590US7863721B2Method and apparatus for wafer level integration using tapered viasSTATS CHIPPAC LTD·Filed 2008·Granted Jan 4, 2011·19 cites·25 claims
- 3689US9842775B2Semiconductor device and method of forming a thin wafer without a carrierSTATS CHIPPAC PTE LTD·Filed 2016·Granted Dec 12, 2017·5 cites·16 claims
- 3787US10446479B2Semiconductor device and method of forming a PoP device with embedded vertical interconnect unitsSTATS CHIPPAC PTE LTD·Filed 2017·Granted Oct 15, 2019·4 cites·6 claims
- 3887US9287204B2Semiconductor device and method of bonding semiconductor die to substrate in reconstituted wafer formSTATS CHIPPAC LTD·Filed 2013·Granted Mar 15, 2016·8 cites·25 claims
- 3987US7723225B2Solder bump confinement system for an integrated circuit packageSTATS CHIPPAC LTD·Filed 2007·Granted May 25, 2010·13 cites·10 claims
- 4087US7378300B2Integrated circuit package systemSTATS CHIPPAC LTD·Filed 2005·Granted May 27, 2008·15 cites·32 claims
- 4186US9893017B2Double-sided semiconductor package and dual-mold method of making sameSTATS CHIPPAC LTD·Filed 2016·Granted Feb 13, 2018·4 cites·21 claims
- 4286US9105532B2Semiconductor device and method of forming interconnect structure over seed layer on contact pad of semiconductor die without undercutting seed layer beneath interconnect structureSTATS CHIPPAC LTD·Filed 2014·Granted Aug 11, 2015·5 cites·25 claims
- 4385US11469191B2Antenna in embedded wafer-level ball-grid array packageSTATS CHIPPAC PTE LTD·Filed 2020·Granted Oct 11, 2022·2 cites·17 claims
- 4485US10707150B2Semiconductor device and method of forming a fan-out PoP device with PWB vertical interconnect unitsSTATS CHIPPAC PTE LTD·Filed 2018·Granted Jul 7, 2020·3 cites·23 claims
- 4584US9620413B2Semiconductor device and method of using a standardized carrier in semiconductor packagingSTATS CHIPPAC LTD·Filed 2013·Granted Apr 11, 2017·4 cites·25 claims
- 4684US9245770B2Semiconductor device and method of simultaneous molding and thermalcompression bondingSTATS CHIPPAC LTD·Filed 2013·Granted Jan 26, 2016·7 cites·24 claims
- 4784US9184139B2Semiconductor device and method of reducing warpage using a silicon to encapsulant ratioSTATS CHIPPAC LTD·Filed 2013·Granted Nov 10, 2015·6 cites·25 claims
- 4884US7554179B2Multi-leadframe semiconductor package and method of manufactureSTATS CHIPPAC LTD·Filed 2005·Granted Jun 30, 2009·12 cites·20 claims
- 4983US10777528B2Semiconductor device and method of forming embedded wafer level chip scale packagesSTATS CHIPPAC PTE LTD·Filed 2017·Granted Sep 15, 2020·2 cites·21 claims
- 5082US12469819B2Semiconductor device and method of forming embedded wafer level chip scale packagesSTATS CHIPPAC PTE LTD·Filed 2022·Granted Nov 11, 2025·0 cites·20 claims
Showing the top 50 of 107 patent records by PatentIndex Score.
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