Inventor · disambiguated record
Kevin Y. Li
Also filed as: LI KEVIN · LI KEVIN Y · LI KEVIN YUFU
8 granted patents·6 pending applications·12 citations·filing 2006–2021
78Inventor score
Top patents by PatentIndex Score
14 records- 0185US8386618B2System and method for facilitating wireless communication during a pre-boot phase of a computing deviceINTEL CORP·Filed 2010·Granted Feb 26, 2013·7 cites·18 claims
- 0278US10684865B2Access isolation for multi-operating system devicesINTEL CORP·Filed 2019·Granted Jun 16, 2020·2 cites·26 claims
- 0368US10289425B2Access isolation for multi-operating system devicesINTEL CORP·Filed 2014·Granted May 14, 2019·2 cites·22 claims
- 0461US9389668B2Power optimization for distributed computing systemINTEL CORP·Filed 2012·Granted Jul 12, 2016·1 cites·20 claims
- 0560US12379982B2Methods and apparatus for runtime recovery of processor linksINTEL CORP·Filed 2021·Granted Aug 5, 2025·0 cites·20 claims
- 0648US12493410B2Accelerating system boot times via host-managed device memoryINTEL CORP·Filed 2020·Granted Dec 9, 2025·0 cites·25 claims
- 0747US2024241805A1Apparatus, computer-readable medium, and method for increasing memory error handling accuracyINTEL CORP·Filed 2021·Application pending·0 cites
- 0845US2013311665A1System and method for facilitating wireless communication during a pre-boot phase of a computing deviceBAILEY ABDUL M·Filed 2013·Application pending·0 cites
- 0945US2021397530A1Methods and apparatus to transmit central processing unit performance information to an operating systemINTEL CORP·Filed 2021·Application pending·0 cites
- 1042US11455261B2First boot with one memory channelINTEL CORP·Filed 2017·Granted Sep 27, 2022·0 cites·24 claims
- 1142US7900029B2Method and apparatus to simplify configuration calculation and management of a processor systemLIU JASON·Filed 2007·Granted Mar 1, 2011·0 cites·7 claims
- 1241US2007233925A1Centralized management of data nodesSAP AG·Filed 2006·Application pending·0 cites
- 1336US2024185905A1A memory device, a memory module, a computing system, a method for erasing a memory portion of a memory device and a method for generating an erase requestINTEL CORP·Filed 2021·Application pending·0 cites
- 1435US2023144332A1Technology to automatically conduct speed switching in processor links without warm resetsINTEL CORP·Filed 2020·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →