Inventor · disambiguated record
James M. Simkins
Also filed as: SIMKINS JAMES M
38 granted patents·993 citations·filing 2001–2013
98Inventor score
Top patents by PatentIndex Score
38 records- 0198US7472155B2Programmable logic device with cascading DSP slicesXILINX INC·Filed 2004·Granted Dec 30, 2008·111 cites·44 claims
- 0296US9081634B1Digital signal processing blockXILINX INC·Filed 2012·Granted Jul 14, 2015·61 cites·9 claims
- 0393US7274211B1Structures and methods for implementing ternary adders/subtractors in programmable logic devicesXILINX INC·Filed 2006·Granted Sep 25, 2007·38 cites·20 claims
- 0492US7567997B2Applications of cascading DSP slicesXILINX INC·Filed 2004·Granted Jul 28, 2009·71 cites·16 claims
- 0592US7184466B1Radio frequency data conveyance system including configurable integrated circuitsXILINX INC·Filed 2002·Granted Feb 27, 2007·63 cites·20 claims
- 0691US7882165B2Digital signal processing element having an arithmetic logic unitXILINX INC·Filed 2006·Granted Feb 1, 2011·25 cites·19 claims
- 0791US7797610B1Method and apparatus for virtual quad-port random access memoryXILINX INC·Filed 2005·Granted Sep 14, 2010·26 cites·11 claims
- 0891US7467175B2Programmable logic device with pipelined DSP slicesXILINX INC·Filed 2004·Granted Dec 16, 2008·45 cites·33 claims
- 0990US8912829B1Method and apparatus for using a synchronous reset pulse to reset circuitry in multiple clock domainsXILINX INC·Filed 2013·Granted Dec 16, 2014·12 cites·20 claims
- 1090US7480690B2Arithmetic circuit with multiplexed addend inputsXILINX INC·Filed 2004·Granted Jan 20, 2009·61 cites·29 claims
- 1189US6690201B1Method and apparatus for locating data transition regionsXILINX INC·Filed 2002·Granted Feb 10, 2004·87 cites·24 claims
- 1288US8104012B1System and methods for reducing clock power in integrated circuitsKLEIN MATTHEW H·Filed 2009·Granted Jan 24, 2012·21 cites·20 claims
- 1388US7233168B1Methods of setting and resetting lookup table memory cellsXILINX INC·Filed 2005·Granted Jun 19, 2007·20 cites·14 claims
- 1486US6983394B1Method and apparatus for clock signal performance measurementXILINX INC·Filed 2003·Granted Jan 3, 2006·52 cites·40 claims
- 1585US7467177B2Mathematical circuit with dynamic roundingXILINX INC·Filed 2004·Granted Dec 16, 2008·43 cites·30 claims
- 1684US7870182B2Digital signal processing circuit having an adder circuit with carry-outsXILINX INC·Filed 2006·Granted Jan 11, 2011·21 cites·20 claims
- 1783US8220060B1Method and system for maintaining the security of design informationSIMKINS JAMES M·Filed 2010·Granted Jul 10, 2012·7 cites·19 claims
- 1883US8001171B1Pipeline FFT architecture for a programmable deviceXILINX INC·Filed 2006·Granted Aug 16, 2011·16 cites·20 claims
- 1982US7840630B2Arithmetic logic unit circuitXILINX INC·Filed 2006·Granted Nov 23, 2010·17 cites·20 claims
- 2082US7100101B1Method and apparatus for concatenated and interleaved turbo product code encoding and decodingXILINX INC·Filed 2002·Granted Aug 29, 2006·30 cites·20 claims
- 2181US7757294B1Method and system for maintaining the security of design informationXILINX INC·Filed 2004·Granted Jul 13, 2010·26 cites·19 claims
- 2280US7865542B2Digital signal processing block having a wide multiplexerXILINX INC·Filed 2006·Granted Jan 4, 2011·16 cites·16 claims
- 2377US7853632B2Architectural floorplan for a digital signal processing circuitXILINX INC·Filed 2006·Granted Dec 14, 2010·12 cites·20 claims
- 2477US7849119B2Digital signal processing circuit having a pattern detector circuitXILINX INC·Filed 2006·Granted Dec 7, 2010·12 cites·19 claims
- 2575US7860915B2Digital signal processing circuit having a pattern circuit for determining termination conditionsXILINX INC·Filed 2006·Granted Dec 28, 2010·11 cites·16 claims
- 2675US7844653B2Digital signal processing circuit having a pre-adder circuitXILINX INC·Filed 2006·Granted Nov 30, 2010·11 cites·18 claims
- 2774US7853634B2Digital signal processing circuit having a SIMD circuitXILINX INC·Filed 2006·Granted Dec 14, 2010·10 cites·20 claims
- 2874US7853636B2Digital signal processing circuit having a pattern detector circuit for convergent roundingXILINX INC·Filed 2006·Granted Dec 14, 2010·10 cites·20 claims
- 2970US7840627B2Digital signal processing circuit having input register blocksXILINX INC·Filed 2006·Granted Nov 23, 2010·8 cites·19 claims
- 3066US8495122B2Programmable device with dynamic DSP architectureSIMKINS JAMES M·Filed 2004·Granted Jul 23, 2013·12 cites·16 claims
- 3164US8543635B2Digital signal processing block with preadder stageSIMKINS JAMES M·Filed 2009·Granted Sep 24, 2013·4 cites·20 claims
- 3264US7161995B1Method and apparatus for Viterbi synchronizationXILINX INC·Filed 2002·Granted Jan 9, 2007·10 cites·28 claims
- 3364US6603368B1High data rate vector demodulatorL 3 COMM CORP·Filed 2002·Granted Aug 5, 2003·9 cites·20 claims
- 3463US8866509B1Flip-flop array with option to ignore control signalsXILINX INC·Filed 2013·Granted Oct 21, 2014·2 cites·20 claims
- 3563US7133397B2Time division duplex system utilizing global positioning system timing signals for access point synchronizationL 3 COMM CORP·Filed 2001·Granted Nov 7, 2006·6 cites·13 claims
- 3660US9075930B2Configurable embedded memory systemXILINX INC·Filed 2012·Granted Jul 7, 2015·1 cites·17 claims
- 3760US7535789B1Circuits and methods of concatenating FIFOsXILINX INC·Filed 2006·Granted May 19, 2009·4 cites·12 claims
- 3839US8479133B2Method of and circuit for implementing a filter in an integrated circuitWENDLING XAVIER·Filed 2009·Granted Jul 2, 2013·2 cites·20 claims
Join the waitlist — get patent alerts
Get an alert when James M. Simkins files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →