Inventor · disambiguated record
Chih-Ning Wu
Also filed as: WU CHIH-NING
22 granted patents·11 pending applications·267 citations·filing 1997–2008
95Inventor score
Files withUNITED MICROELECTRONICS CORP20WU CHIH-NING6CHEN CHENG-KUEN1LEE CHUNG-JU1NAT SCIENCE COUNCIL1
Top patents by PatentIndex Score
33 records- 0196US7491615B2Method of fabricating strained-silicon transistors and strained-silicon CMOS transistorsUNITED MICROELECTRONICS CORP·Filed 2005·Granted Feb 17, 2009·54 cites·25 claims
- 0285US6303482B1Method for cleaning the surface of a semiconductor waferUNITED MICROELECTRONICS CORP·Filed 2000·Granted Oct 16, 2001·34 cites·16 claims
- 0384US6635565B2Method of cleaning a dual damascene structureUNITED MICROELECTRONICS CORP·Filed 2001·Granted Oct 21, 2003·32 cites·15 claims
- 0481US7214988B2Metal oxide semiconductor transistorUNITED MICROELECTRONICS CORP·Filed 2005·Granted May 8, 2007·8 cites·9 claims
- 0581US6767825B1Etching process for forming damascene structure of the semiconductorUNITED MICROELECTRONICS CORP·Filed 2003·Granted Jul 27, 2004·26 cites·32 claims
- 0678US7338910B2Method of fabricating semiconductor devices and method of removing a spacerUNITED MICROELECTRONICS CORP·Filed 2005·Granted Mar 4, 2008·6 cites·18 claims
- 0773US7544621B2Method of removing a metal silicide layer on a gate electrode in a semiconductor manufacturing process and etching methodUNITED MICROELECTRONICS CORP·Filed 2005·Granted Jun 9, 2009·5 cites·14 claims
- 0871US6780761B1Via-first dual damascene processUNITED MICROELECTRONICS CORP·Filed 2003·Granted Aug 24, 2004·20 cites·21 claims
- 0970US6733597B2Method of cleaning a dual damascene structureUNITED MICROELECTRONICS CORP·Filed 2001·Granted May 11, 2004·11 cites·6 claims
- 1065US6794292B2Extrusion-free wet cleaning process for copper-dual damascene structuresUNITED MICROELECTRONICS CORP·Filed 2001·Granted Sep 21, 2004·8 cites·7 claims
- 1160US6554002B2Method for removing etching residuesUNITED MICROELECTRONICS CORP·Filed 2001·Granted Apr 29, 2003·9 cites·4 claims
- 1260US6511916B1Method for removing the photoresist layer in the damascene processUNITED MICROELECTRONICS CORP·Filed 2002·Granted Jan 28, 2003·7 cites·13 claims
- 1360US6060415AAligned molecular sieve crystals grown on anodic alumina membraneNAT SCIENCE COUNCIL·Filed 1997·Granted May 9, 2000·28 cites·10 claims
- 1459US7172976B2Extrusion-free wet cleaning process for copper-dual damascene structuresUNITED MICROELECTRONICS CORP·Filed 2004·Granted Feb 6, 2007·5 cites·10 claims
- 1556US6692580B2Method of cleaning a dual damascene structureUNITED MICROELECTRONICS CORP·Filed 2003·Granted Feb 17, 2004·4 cites·11 claims
- 1652US6453915B1Post polycide gate etching cleaning methodUNITED MICROELECTRONICS CORP·Filed 2000·Granted Sep 24, 2002·5 cites·21 claims
- 1749US7196019B2Method of removing spacers and fabricating MOS transistorUNITED MICROELECTRONICS CORP·Filed 2004·Granted Mar 27, 2007·2 cites·8 claims
- 1847US7595234B2Fabricating method for a metal oxide semiconductor transistorUNITED MICROELECTRONICS CORP·Filed 2006·Granted Sep 29, 2009·0 cites·22 claims
- 1947US6440873B1Post metal etch cleaning methodUNITED MICROELECTRONICS CORP·Filed 2001·Granted Aug 27, 2002·1 cites·20 claims
- 2047US2007072378A1Method of manufacturing metal-oxide-semiconductor transistor devicesWU CHIH-NING·Filed 2006·Application pending·0 cites
- 2147US2008286976A1Method of removing a metal silicide layer on a gate electrode in a semiconductor manufacturing process and etching methodCHEN CHENG-KUEN·Filed 2008·Application pending·0 cites
- 2247US2007075379A1Metal-oxide-semiconductor transistor deviceWU CHIH-NING·Filed 2006·Application pending·0 cites
- 2346US6495472B2Method for avoiding erosion of conductor structure during removing etching residuesUNITED MICROELECTRONICS CORPS·Filed 2001·Granted Dec 17, 2002·2 cites·4 claims
- 2446US2007072358A1Method of manufacturing metal-oxide-semiconductor transistor devicesWU CHIH-NING·Filed 2005·Application pending·0 cites
- 2543US7220647B2Method of cleaning wafer and method of manufacturing gate structureUNITED MICROELECTRONICS CORP·Filed 2005·Granted May 22, 2007·0 cites·23 claims
- 2640US2007045227A1Method of stripping photoresistWU CHIH-NING·Filed 2005·Application pending·0 cites
- 2740US2006134921A1Plasma etching processWU CHIH-NING·Filed 2005·Application pending·0 cites
- 2839US2007054447A1Multistep etching methodTAI HSIN·Filed 2005·Application pending·0 cites
- 2938US2004219796A1Plasma etching processFiled 2003·Application pending·0 cites
- 3038US2006110688A1Etching process compatible with DUV lithographyLEE CHUNG-JU·Filed 2004·Application pending·0 cites
- 3135US2002119672A1Post-etching cleaning process in dual damascene structure manufacturingFiled 2001·Application pending·0 cites
- 3234US7135400B2Damascene process capable of avoiding via resist poisoningUNITED MICROELECTRONICS CORP·Filed 2004·Granted Nov 14, 2006·0 cites·11 claims
- 3330US2005239286A1Two-step stripping method for removing via photoresist during the fabrication of partial-via dual damascene featuresWU CHIH-NING·Filed 2004·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →