Inventor · disambiguated record
Phillip J. Restle
Also filed as: RESTLE PHILLIP · RESTLE PHILLIP J · RESTLE PHILLIP JOHN
60 granted patents·5 pending applications·833 citations·filing 1995–2022
98Inventor score
Top patents by PatentIndex Score
65 records- 0194US10171081B1On-chip supply noise voltage reduction or mitigation using local detection loops in a processor coreIBM·Filed 2017·Granted Jan 1, 2019·11 cites·20 claims
- 0293US10261561B2Mitigation of on-chip supply voltage based on local and non-local (neighboring) cores' supply voltage information and decisionIBM·Filed 2016·Granted Apr 16, 2019·13 cites·16 claims
- 0393US8736342B1Changing resonant clock modesIBM·Filed 2012·Granted May 27, 2014·21 cites·23 claims
- 0492US8704576B1Variable resistance switch for wide bandwidth resonant global clock distributionIBM·Filed 2013·Granted Apr 22, 2014·20 cites·20 claims
- 0592US7961559B2Duty cycle measurement circuit for measuring and maintaining balanced clock duty cycleIBM·Filed 2009·Granted Jun 14, 2011·21 cites·15 claims
- 0692US6311313B1X-Y grid tree clock distribution network with tunable tree and grid networksIBM·Filed 1998·Granted Oct 30, 2001·196 cites·28 claims
- 0791US10552250B2Proactive voltage droop reduction and/or mitigation in a processor coreIBM·Filed 2017·Granted Feb 4, 2020·6 cites·20 claims
- 0891US7571410B2Resonant tree driven clock distribution gridIBM·Filed 2007·Granted Aug 4, 2009·22 cites·11 claims
- 0990US9634654B2Sequenced pulse-width adjustment in a resonant clocking circuitIBM·Filed 2015·Granted Apr 25, 2017·7 cites·11 claims
- 1090US9568548B1Measurement of signal delays in microprocessor integrated circuits with sub-picosecond accuracy using frequency steppingIBM·Filed 2015·Granted Feb 14, 2017·4 cites·13 claims
- 1188US11275644B2Proactive voltage droop reduction and/or mitigation in a processor coreIBM·Filed 2019·Granted Mar 15, 2022·4 cites·20 claims
- 1288US8525569B2Synchronizing global clocks in 3D stacks of integrated circuits by shorting the clock networkBUCELOT THOMAS J·Filed 2011·Granted Sep 3, 2013·16 cites·25 claims
- 1386US7237217B2Resonant tree driven clock distribution gridIBM·Filed 2003·Granted Jun 26, 2007·39 cites·15 claims
- 1485US9054682B2Wide bandwidth resonant global clock distributionIBM·Filed 2013·Granted Jun 9, 2015·7 cites·20 claims
- 1585US7400555B2Built in self test circuit for measuring total timing uncertainty in a digital data pathIBM·Filed 2003·Granted Jul 15, 2008·24 cites·29 claims
- 1684US9058130B2Tunable sector buffer for wide bandwidth resonant global clock distributionIBM·Filed 2013·Granted Jun 16, 2015·7 cites·31 claims
- 1784US7962887B2Self-learning of the optimal power or performance operating point of a computer chip based on instantaneous feedback of present operating environmentIBM·Filed 2008·Granted Jun 14, 2011·7 cites·18 claims
- 1883US11989071B2Dynamic guard band with timing protection and with performance protectionIBM·Filed 2022·Granted May 21, 2024·1 cites·20 claims
- 1983US8516426B2Vertical power budgeting and shifting for three-dimensional integrationBOSE PRADIP·Filed 2011·Granted Aug 20, 2013·7 cites·25 claims
- 2082US9575119B1Measurement of signal delays in microprocessor integrated circuits with sub-picosecond accuracy using frequency steppingIBM·Filed 2016·Granted Feb 21, 2017·2 cites·7 claims
- 2182US9276563B2Clock buffers with pulse drive capability for power efficiencyIBM·Filed 2014·Granted Mar 1, 2016·5 cites·20 claims
- 2282US6205571B1X-Y grid tree tuning methodIBM·Filed 1998·Granted Mar 20, 2001·104 cites·18 claims
- 2381US10437311B2Mitigation of on-chip supply voltage noise by monitoring slope of supply voltage based on time-based sensorsIBM·Filed 2016·Granted Oct 8, 2019·3 cites·19 claims
- 2481US9618966B2Pulse-drive resonant clock with on-the-fly mode changeIBM·Filed 2015·Granted Apr 11, 2017·3 cites·7 claims
- 2581US9612614B2Pulse-drive resonant clock with on-the-fly mode changeIBM·Filed 2015·Granted Apr 4, 2017·3 cites·13 claims
- 2681US8863066B1Wiring-optimal method to route high performance clock nets satisfying electrical and reliability constraintsIBM·Filed 2013·Granted Oct 14, 2014·6 cites·20 claims
- 2780US6933754B2Clock gated power supply noise compensationIBM·Filed 2003·Granted Aug 23, 2005·21 cites·29 claims
- 2875US7941689B2Minimizing clock uncertainty on clock distribution networks using a multi-level de-skewing techniqueIBM·Filed 2008·Granted May 10, 2011·9 cites·12 claims
- 2973US8887118B2Setting switch size and transition pattern in a resonant clock distribution systemIBM·Filed 2013·Granted Nov 11, 2014·2 cites·12 claims
- 3073US8850373B2Setting switch size and transition pattern in a resonant clock distribution systemIBM·Filed 2013·Granted Sep 30, 2014·2 cites·5 claims
- 3172US11693728B2Proactive voltage droop reduction and/or mitigation in a processor coreIBM·Filed 2022·Granted Jul 4, 2023·0 cites·20 claims
- 3272US8775996B2Direct current circuit analysis based clock network designIBM·Filed 2012·Granted Jul 8, 2014·3 cites·20 claims
- 3372US6531759B2Alpha particle shield for integrated circuitIBM·Filed 2001·Granted Mar 11, 2003·19 cites·6 claims
- 3471US9231603B2Distributed phase detection for clock synchronization in multi-layer 3D stacksIBM·Filed 2014·Granted Jan 5, 2016·3 cites·20 claims
- 3568US10145892B2Increasing the resolution of on-chip measurement circuitsIBM·Filed 2016·Granted Dec 4, 2018·1 cites·16 claims
- 3668US6006025AMethod of clock routing for semiconductor chipsIBM·Filed 1997·Granted Dec 21, 1999·52 cites·15 claims
- 3764US11561595B2On-chip supply noise voltage reduction or mitigation using local detection loopsIBM·Filed 2021·Granted Jan 24, 2023·0 cites·20 claims
- 3863US9571100B2Clock buffers with pulse drive capability for power efficiencyIBM·Filed 2015·Granted Feb 14, 2017·1 cites·15 claims
- 3962US9268886B2Setting switch size and transition pattern in a resonant clock distribution systemIBM·Filed 2013·Granted Feb 23, 2016·1 cites·12 claims
- 4061US11036276B2Mitigation of on-chip supply voltage noise by monitoring slope of supply voltage based on time-based sensorsIBM·Filed 2019·Granted Jun 15, 2021·0 cites·20 claims
- 4160US6342823B1System and method for reducing calculation complexity of lossy, frequency-dependent transmission-line computationIBM·Filed 1998·Granted Jan 29, 2002·37 cites·6 claims
- 4259US12189415B2Providing deterministic frequency and voltage enhancements for a processorIBM·Filed 2022·Granted Jan 7, 2025·0 cites·20 claims
- 4357US10141915B2Sequenced pulse-width adjustment in a resonant clocking circuitIBM·Filed 2017·Granted Nov 27, 2018·0 cites·17 claims
- 4457US9348357B2Stitchable global clock for 3D chipsIBM·Filed 2014·Granted May 24, 2016·0 cites·20 claims
- 4557US5610528ACapacitive bend sensorIBM·Filed 1995·Granted Mar 11, 1997·93 cites·6 claims
- 4656US10652006B2Determining clock signal quality using a plurality of sensorsIBM·Filed 2017·Granted May 12, 2020·0 cites·15 claims
- 4756US2007103141A1Duty cycle measurment circuit for measuring and maintaining balanced clock duty cycleIBM·Filed 2007·Application pending·0 cites
- 4855US9800232B2Stitchable global clock for 3D chipsIBM·Filed 2016·Granted Oct 24, 2017·0 cites·20 claims
- 4954US11073884B2On-chip supply noise voltage reduction or mitigation using local detection loopsIBM·Filed 2017·Granted Jul 27, 2021·0 cites·14 claims
- 5054US10333520B2On-chip supply noise voltage reduction or mitigation using local detection loops in a processor coreIBM·Filed 2017·Granted Jun 25, 2019·0 cites·6 claims
Showing the top 50 of 65 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →