Inventor · disambiguated record
Andrew M. Volk
Also filed as: HSU JEN-TAI · VOLK ANDREW · VOLK ANDREW M
68 granted patents·5 pending applications·3,081 citations·filing 1976–2024
99Inventor score
Top patents by PatentIndex Score
73 records- 0199US6356105B1Impedance control system for a center tapped termination busINTEL CORP·Filed 2000·Granted Mar 12, 2002·224 cites·27 claims
- 0296US6380758B1Impedance control for wide range loaded signals using distributed methodologyINTEL CORP·Filed 2000·Granted Apr 30, 2002·104 cites·18 claims
- 0396US5615404ASystem having independently addressable bus interfaces coupled to serially connected multi-ported signal distributors generating and maintaining frame based polling schedule favoring isochronous peripheralsINTEL CORP·Filed 1994·Granted Mar 25, 1997·493 cites·6 claims
- 0496US5388265AMethod and apparatus for placing an integrated circuit chip in a reduced power consumption stateINTEL CORP·Filed 1993·Granted Feb 7, 1995·305 cites·17 claims
- 0595US6445316B1Universal impedance control for wide range loaded signalsINTEL CORP·Filed 2000·Granted Sep 3, 2002·81 cites·30 claims
- 0694US6662305B1Fast re-synchronization of independent domain clocks after powerdown to enable fast system start-upINTEL CORP·Filed 1999·Granted Dec 9, 2003·110 cites·27 claims
- 0793US6617888B2Low supply voltage differential signal driverINTEL CORP·Filed 2002·Granted Sep 9, 2003·106 cites·32 claims
- 0893US6542013B1Fractional divisors for multiple-phase PLL systemsINTEL CORP·Filed 2002·Granted Apr 1, 2003·61 cites·29 claims
- 0993US6495997B2High impedance current mode voltage scalable driverINTEL CORP·Filed 2001·Granted Dec 17, 2002·66 cites·20 claims
- 1092US6570371B1Apparatus and method of mirroring a voltage to a different reference voltage pointINTEL CORP·Filed 2002·Granted May 27, 2003·54 cites·26 claims
- 1192US6457095B1Method and apparatus for synchronizing dynamic random access memory exiting from a low power stateINTEL CORP·Filed 1999·Granted Sep 24, 2002·95 cites·25 claims
- 1291US6604179B2Reading a FIFO in dual clock domainsINTEL CORP·Filed 2000·Granted Aug 5, 2003·72 cites·18 claims
- 1390US6166563AMethod and apparatus for dual mode output buffer impedance compensationINTEL CORP·Filed 1999·Granted Dec 26, 2000·106 cites·21 claims
- 1488US4112490AData transfer control apparatus and methodINTEL CORP·Filed 1976·Granted Sep 5, 1978·65 cites·11 claims
- 1587US7466174B2Fast lock scheme for phase locked loops and delay locked loopsINTEL CORP·Filed 2006·Granted Dec 16, 2008·20 cites·28 claims
- 1687US6664906B2Apparatus for reduced glitch energy in digital-to-analog converterINTEL CORP·Filed 2001·Granted Dec 16, 2003·25 cites·20 claims
- 1787US5537069AApparatus and method for selecting a tap range in a digital delay lineINTEL CORP·Filed 1995·Granted Jul 16, 1996·71 cites·24 claims
- 1885US6624662B1Buffer with compensating drive strengthINTEL CORP·Filed 2000·Granted Sep 23, 2003·30 cites·24 claims
- 1985US4819081APhase comparator for extending capture rangeINTEL CORP·Filed 1987·Granted Apr 4, 1989·56 cites·4 claims
- 2082US7203853B2Apparatus and method for low latency power management on a serial data linkINTEL CORP·Filed 2002·Granted Apr 10, 2007·31 cites·39 claims
- 2182US4829258AStabilized phase locked loopINTEL CORP·Filed 1987·Granted May 9, 1989·43 cites·17 claims
- 2281US6693450B1Dynamic swing voltage adjustmentINTEL CORP·Filed 2000·Granted Feb 17, 2004·24 cites·16 claims
- 2381US6369734B2Method and apparatus for increasing linearity and reducing noise coupling in a digital to analog converterINTEL CORP·Filed 1998·Granted Apr 9, 2002·33 cites·14 claims
- 2480US6420899B1Dynamic impedance matched driver for improved slew rate and glitch terminationINTEL CORP·Filed 2000·Granted Jul 16, 2002·31 cites·30 claims
- 2580US5369311AClock generator control circuitINTEL CORP·Filed 1992·Granted Nov 29, 1994·51 cites·28 claims
- 2679US6191662B1Self-start circuits for low-power clock oscillatorsINTEL CORP·Filed 1999·Granted Feb 20, 2001·32 cites·21 claims
- 2778US5384502APhase locked loop circuitry with split loop filterINTEL CORP·Filed 1993·Granted Jan 24, 1995·45 cites·14 claims
- 2875US5999020AHigh-speed, differential pair input bufferINTEL CORP·Filed 1997·Granted Dec 7, 1999·28 cites·13 claims
- 2974US7181631B2Mechanism to control an on die voltage regulatorINTEL CORP·Filed 2003·Granted Feb 20, 2007·19 cites·19 claims
- 3074US6347850B1Programmable buffer circuitINTEL CORP·Filed 1999·Granted Feb 19, 2002·27 cites·20 claims
- 3173US6794919B1Devices and methods for automatically producing a clock signal that follows the master clock signalINTEL CORP·Filed 2000·Granted Sep 21, 2004·16 cites·21 claims
- 3273US6408398B1Method and apparatus for detecting time domains on a communication channelINTEL CORP·Filed 1999·Granted Jun 18, 2002·61 cites·25 claims
- 3370US6940163B2On die voltage regulatorINTEL CORP·Filed 2002·Granted Sep 6, 2005·17 cites·12 claims
- 3470US6915399B1Cross-clock domain data transfer method and apparatusINTEL CORP·Filed 2000·Granted Jul 5, 2005·14 cites·16 claims
- 3569US6971040B2Method and system for reducing the effects of simultaneously switching outputsINTEL CORP·Filed 2001·Granted Nov 29, 2005·12 cites·26 claims
- 3669US6774735B2Low power self-biasing oscillator circuitINTEL CORP·Filed 2002·Granted Aug 10, 2004·14 cites·26 claims
- 3769US6556022B2Method and apparatus for local parameter variation compensationINTEL CORP·Filed 2001·Granted Apr 29, 2003·16 cites·20 claims
- 3869US4546472AMethod and means for testing integrated circuitsINTEL CORP·Filed 1983·Granted Oct 8, 1985·22 cites·14 claims
- 3968US7554312B2DC-to-DC voltage converterINTEL CORP·Filed 2003·Granted Jun 30, 2009·17 cites·18 claims
- 4068US6928494B1Method and apparatus for timing-dependant transfers using FIFOsINTEL CORP·Filed 2000·Granted Aug 9, 2005·17 cites·28 claims
- 4168US6128749ACross-clock domain data transfer method and apparatusINTEL CORP·Filed 1998·Granted Oct 3, 2000·46 cites·12 claims
- 4267US5543734AVoltage supply isolation bufferINTEL CORP·Filed 1994·Granted Aug 6, 1996·30 cites·16 claims
- 4365US8595274B2Random number generatorPRADHAN PRAVAS·Filed 2007·Granted Nov 26, 2013·6 cites·14 claims
- 4465US6392573B1Method and apparatus for reduced glitch energy in digital-to-analog converterINTEL CORP·Filed 1997·Granted May 21, 2002·19 cites·18 claims
- 4564US7479777B2Circuitry and method to measure a duty cycle of a clock signalINTEL CORP·Filed 2006·Granted Jan 20, 2009·5 cites·20 claims
- 4663US7245682B2Determining an optimal sampling clockINTEL CORP·Filed 2002·Granted Jul 17, 2007·8 cites·5 claims
- 4763US6791428B2Duty cycle tuner for low power real time clock oscillatorINTEL CORP·Filed 2002·Granted Sep 14, 2004·8 cites·23 claims
- 4863US6560666B1Hub link mechanism for impedance compensation updateINTEL CORP·Filed 1999·Granted May 6, 2003·38 cites·27 claims
- 4962US7126798B2On die voltage regulatorINTEL CORP·Filed 2004·Granted Oct 24, 2006·12 cites·16 claims
- 5061US5996027ATransmitting specific command during initial configuration step for configuring disk drive controllerINTEL CORP·Filed 1995·Granted Nov 30, 1999·48 cites·25 claims
Showing the top 50 of 73 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →