Inventor · disambiguated record
Kermin Chofleming
Also filed as: CHOFLEMING JR KERMIN E · CHOFLEMING KERMIN · CHOFLEMING KERMIN E
14 granted patents·7 pending applications·63 citations·filing 2018–2023
89Inventor score
Top patents by PatentIndex Score
21 records- 0193US11693633B2Methods and apparatus to detect and annotate backedges in a dataflow graphINTEL CORP·Filed 2021·Granted Jul 4, 2023·6 cites·24 claims
- 0293US10915471B2Apparatuses, methods, and systems for memory interface circuit allocation in a configurable spatial acceleratorINTEL CORP·Filed 2019·Granted Feb 9, 2021·8 cites·24 claims
- 0393US10678724B1Apparatuses, methods, and systems for in-network storage in a configurable spatial acceleratorINTEL CORP·Filed 2018·Granted Jun 9, 2020·13 cites·24 claims
- 0491US11029958B1Apparatuses, methods, and systems for configurable operand size operations in an operation configurable spatial acceleratorINTEL CORP·Filed 2019·Granted Jun 8, 2021·26 cites·24 claims
- 0577US11029927B2Methods and apparatus to detect and annotate backedges in a dataflow graphINTEL CORP·Filed 2019·Granted Jun 8, 2021·2 cites·24 claims
- 0675US10965536B2Methods and apparatus to insert buffers in a dataflow graphINTEL CORP·Filed 2019·Granted Mar 30, 2021·2 cites·44 claims
- 0774US10817291B2Apparatuses, methods, and systems for swizzle operations in a configurable spatial acceleratorINTEL CORP·Filed 2019·Granted Oct 27, 2020·2 cites·24 claims
- 0873US11037050B2Apparatuses, methods, and systems for memory interface circuit arbitration in a configurable spatial acceleratorINTEL CORP·Filed 2019·Granted Jun 15, 2021·4 cites·24 claims
- 0963US11385873B2Control speculation in dataflow graphsINTEL CORP·Filed 2020·Granted Jul 12, 2022·0 cites·24 claims
- 1059US10860301B2Control speculation in dataflow graphsINTEL CORP·Filed 2019·Granted Dec 8, 2020·0 cites·24 claims
- 1157US12332802B2Multi-stage cache tag with first stage tag size reductionINTEL CORP·Filed 2021·Granted Jun 17, 2025·0 cites·21 claims
- 1254US2023409478A1Method and apparatus to reduce latency of a memory-side cacheINTEL CORP·Filed 2023·Application pending·0 cites
- 1352US12204478B2Techniques for near data acceleration for a multi-core architectureINTEL CORP·Filed 2021·Granted Jan 21, 2025·0 cites·23 claims
- 1451US2024220323A1Apparatuses, methods, and systems for instructions for loading a tile of a matrix operations acceleratorINTEL CORP·Filed 2022·Application pending·0 cites
- 1549US2023124832A1Concept for Handling Transient ErrorsDIETER WILLIAM·Filed 2022·Application pending·0 cites
- 1648US2023008856A1Neural network facilitating fixed-point emulation of floating-point computationHENRY GREGORY·Filed 2022·Application pending·0 cites
- 1746US11907713B2Apparatuses, methods, and systems for fused operations using sign modification in a processing element of a configurable spatial acceleratorINTEL CORP·Filed 2019·Granted Feb 20, 2024·0 cites·24 claims
- 1845US11249683B2Simulated-annealing based memory allocationsINTEL CORP·Filed 2020·Granted Feb 15, 2022·0 cites·25 claims
- 1945US2020409709A1Apparatuses, methods, and systems for time-multiplexing in a configurable spatial acceleratorINTEL CORP·Filed 2019·Application pending·0 cites
- 2042US2022107897A1Cache probe transaction filteringINTEL CORP·Filed 2021·Application pending·0 cites
- 2137US2023367640A1Program execution strategies for heterogeneous computing systemsINTEL CORP·Filed 2021·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →