Inventor · disambiguated record
Shinji Fukasawa
Also filed as: FUKASAWA SHINJI
4 granted patents·3 pending applications·50 citations·filing 2001–2005
75Inventor score
Top patents by PatentIndex Score
7 records- 0178US7437699B2Layout method for semiconductor integrated circuit, layout program for semiconductor integrated circuit and layout system for semiconductor integrated circuitFUJITSU LTD·Filed 2004·Granted Oct 14, 2008·30 cites·9 claims
- 0265US6941534B2Semiconductor device and layout data generation apparatusFUJITSU LTD·Filed 2001·Granted Sep 6, 2005·15 cites·19 claims
- 0356US7185303B2Method and apparatus for laying out cells in a semiconductor deviceFUJITSU LTD·Filed 2005·Granted Feb 27, 2007·2 cites·20 claims
- 0453US7480844B2Method for eliminating hold error in scan chainFUJITSU MICROELECTRONICS LTD·Filed 2005·Granted Jan 20, 2009·3 cites·10 claims
- 0535US2003015800A1Semiconductor device having a multiple layer wiring structure, wiring method, wiring device, and recording mediumFUJITSU LTD·Filed 2002·Application pending·0 cites
- 0635US2003067075A1Semiconductor device having a multiple layer wiring structure, wiring method, wiring device, and recording mediumFUJITSU LTD·Filed 2002·Application pending·0 cites
- 0734US2002074660A1Semiconductor device having a multiple layer wiring structure, wiring method, wiring device, and recording mediumFUJITSU LTD·Filed 2001·Application pending·0 cites
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