Inventor · disambiguated record
Narendra V. Shenoy
Also filed as: SHENOY NARENDRA · SHENOY NARENDRA V
8 granted patents·168 citations·filing 1995–2008
87Inventor score
Technology areasG06F
Files withSYNOPSYS INC8
Top patents by PatentIndex Score
8 records- 0183US7689957B2Identifying and improving robust designs using statistical timing analysisSYNOPSYS INC·Filed 2007·Granted Mar 30, 2010·15 cites·8 claims
- 0271US5822217AMethod and apparatus for improving circuit retimingSYNOPSYS INC·Filed 1995·Granted Oct 13, 1998·67 cites·20 claims
- 0366US7260797B2Method and apparatus for estimating parasitic capacitanceSYNOPSYS INC·Filed 2004·Granted Aug 21, 2007·15 cites·24 claims
- 0463US8042010B2Two-phase clock-stalling technique for error detection and error correctionSYNOPSYS INC·Filed 2008·Granted Oct 18, 2011·3 cites·20 claims
- 0561US7260807B2Method and apparatus for designing an integrated circuit using a mask-programmable fabricSYNOPSYS INC·Filed 2003·Granted Aug 21, 2007·11 cites·29 claims
- 0653US6378114B1Method for the physical placement of an integrated circuit adaptive to netlist changesSYNOPSYS INC·Filed 1997·Granted Apr 23, 2002·28 cites·15 claims
- 0752US6397169B1Adaptive cell separation and circuit changes driven by maximum capacitance rulesSYNOPSYS INC·Filed 1998·Granted May 28, 2002·29 cites·18 claims
- 0842US7100142B2Method and apparatus for creating a mask-programmable architecture from standard cellsSYNOPSYS INC·Filed 2004·Granted Aug 29, 2006·0 cites·24 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →