Inventor · disambiguated record
Daniel Klowden
Also filed as: KLOWDEN DANIEL · KLOWDEN DANIEL S
6 granted patents·4 pending applications·35 citations·filing 2003–2023
78Inventor score
Top patents by PatentIndex Score
10 records- 0169US7500131B2Training pattern based de-skew mechanism and frame alignmentINTEL CORP·Filed 2004·Granted Mar 3, 2009·17 cites·24 claims
- 0264US7656983B2Dual clock domain deskew circuitINTEL CORP·Filed 2006·Granted Feb 2, 2010·3 cites·14 claims
- 0364US7051295B2IC design process including automated removal of body contacts from MOSFET devicesINTEL CORP·Filed 2003·Granted May 23, 2006·10 cites·26 claims
- 0455US2024355980A1Photonic integrated circuit packages with scalable heterogeneous integrationINTEL CORP·Filed 2023·Application pending·0 cites
- 0553US7346795B2Delaying lanes in order to align all lanes crossing between two clock domainsINTEL CORP·Filed 2004·Granted Mar 18, 2008·5 cites·13 claims
- 0651US12158852B2Circuitry and methods for direct memory access instruction set architecture support for flexible dense compute using a reconfigurable spatial arrayINTEL CORP·Filed 2021·Granted Dec 3, 2024·0 cites·24 claims
- 0750US11983135B2Electrical and optical interfaces at different heights along an edge of a package to increase bandwidth along the edgeINTEL CORP·Filed 2020·Granted May 14, 2024·0 cites·20 claims
- 0844US2022092016A1Off-package high density, high bandwidth memory access using optical linksINTEL CORP·Filed 2020·Application pending·0 cites
- 0940US2024256283A1Computing architectureINTEL CORP·Filed 2022·Application pending·0 cites
- 1038US2006146967A1Keep-out asynchronous clock alignment schemePANIKKAR ADARSH·Filed 2004·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →