Inventor · disambiguated record
Monte J. Dalrymple
Also filed as: DALRYMPLE MONTE J
17 granted patents·2 pending applications·572 citations·filing 1982–2011
95Inventor score
Top patents by PatentIndex Score
19 records- 0190US4446381ACircuit and technique for initializing the state of bistable elements in an integrated electronic circuitZILOG INC·Filed 1982·Granted May 1, 1984·38 cites·6 claims
- 0289US4942553ASystem for providing notification of impending FIFO overruns and underrunsZILOG INC·Filed 1988·Granted Jul 17, 1990·125 cites·7 claims
- 0377US5495594ATechnique for automatically adapting a peripheral integrated circuit for operation with a variety of microprocessor control signal protocolsZILOG INC·Filed 1994·Granted Feb 27, 1996·76 cites·3 claims
- 0475US4885584ASerializer system with variable character length capabilitiesZILOG INC·Filed 1988·Granted Dec 5, 1989·27 cites·10 claims
- 0572US5012180ASystem for testing internal nodesZILOG INC·Filed 1988·Granted Apr 30, 1991·49 cites·16 claims
- 0668US5625842ASystem for the automatic transfer of message status in digital data communicationZILOG INC·Filed 1994·Granted Apr 29, 1997·49 cites·10 claims
- 0767US8832488B2Method and apparatus for digital I/O expander chip with multi-function timer cellsROGERS NORMAN L·Filed 2011·Granted Sep 9, 2014·3 cites·5 claims
- 0864US5025412AUniversal bus interfaceZILOG INC·Filed 1988·Granted Jun 18, 1991·41 cites·6 claims
- 0959US5193199ADevice and method for programming critical hardware parametersZILOG INC·Filed 1991·Granted Mar 9, 1993·37 cites·4 claims
- 1057US7941687B2Method and apparatus for digital I/O expander chip with multi-function timer cellsDIGI INT INC·Filed 2007·Granted May 10, 2011·2 cites·10 claims
- 1155US5220673ADevice and method for programming critical hardware parametersZILOG INC·Filed 1991·Granted Jun 15, 1993·31 cites·2 claims
- 1254US5153509ASystem for testing internal nodes in receive and transmit FIFO'sZILOG INC·Filed 1991·Granted Oct 6, 1992·28 cites·4 claims
- 1354US5027310ACarry chain incrementer and/or decrementer circuitZILOG INC·Filed 1989·Granted Jun 25, 1991·20 cites·7 claims
- 1447US5032982ADevice for timing interrupt acknowledge cyclesZILOG INC·Filed 1990·Granted Jul 16, 1991·21 cites·2 claims
- 1539US5602537ATechnique for eliminating data transmit memory underrunsZILOG INC·Filed 1996·Granted Feb 11, 1997·11 cites·15 claims
- 1639US4617476AHigh speed clocked, latched, and bootstrapped bufferZILOG INC·Filed 1984·Granted Oct 14, 1986·4 cites·5 claims
- 1738US5428746AIntegrated microprocessor unit generating separate memory and input-output device control signalsZILOG INC·Filed 1992·Granted Jun 27, 1995·10 cites·12 claims
- 1836US2002032829A1Microprocessor memory device controllerWORLD INC Z·Filed 2001·Application pending·0 cites
- 1935US2002038433A1System and method for utilizing programmed multi-speed operation with a microprocessor to reduce power consumptionWORLD INC Z·Filed 2001·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Monte J. Dalrymple files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →