Inventor · disambiguated record
Miguel Comparan
Also filed as: COMPARAN MIGUEL
33 granted patents·2 pending applications·501 citations·filing 2007–2021
97Inventor score
Files withMICROSOFT TECHNOLOGY LICENSING LLC12IBM11COMPARAN MIGUEL10BROWN JEFFREY D1MUMFORD CLINT WAYNE1
Top patents by PatentIndex Score
35 records- 0199US8310497B2Anisotropic texture filtering with texture data prefetchingCOMPARAN MIGUEL·Filed 2012·Granted Nov 13, 2012·133 cites·24 claims
- 0299US8217953B2Anisotropic texture filtering with texture data prefetchingCOMPARAN MIGUEL·Filed 2008·Granted Jul 10, 2012·135 cites·2 claims
- 0397US9978118B1No miss cache structure for real-time image transformations with data compressionMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2017·Granted May 22, 2018·55 cites·24 claims
- 0492US7917703B2Network on chip that maintains cache coherency with invalidate commandsIBM·Filed 2007·Granted Mar 29, 2011·29 cites·16 claims
- 0591US9354884B2Processor with hybrid pipeline capable of operating in out-of-order and in-order modesIBM·Filed 2013·Granted May 31, 2016·12 cites·22 claims
- 0691US8082420B2Method and apparatus for executing instructionsCOMPARAN MIGUEL·Filed 2007·Granted Dec 20, 2011·38 cites·14 claims
- 0790US8719508B2Near neighbor data cache sharingIBM·Filed 2012·Granted May 6, 2014·12 cites·8 claims
- 0889US8010750B2Network on chip that maintains cache coherency with invalidate commandsIBM·Filed 2008·Granted Aug 30, 2011·20 cites·16 claims
- 0985US8856602B2Multi-core processor with internal voting-based built in self test (BIST)BROWN JEFFREY D·Filed 2011·Granted Oct 7, 2014·9 cites·25 claims
- 1085US7890699B2Processing unit incorporating L1 cache bypassIBM·Filed 2008·Granted Feb 15, 2011·14 cites·24 claims
- 1184US10672368B2No miss cache structure for real-time image transformations with multiple LSR processing enginesMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2019·Granted Jun 2, 2020·3 cites·19 claims
- 1284US10114652B2Processor with hybrid pipeline capable of operating in out-of-order and in-order modesIBM·Filed 2016·Granted Oct 30, 2018·3 cites·18 claims
- 1383US10242654B2No miss cache structure for real-time image transformationsMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2017·Granted Mar 26, 2019·3 cites·19 claims
- 1482US10360832B2Post-rendering image transformation using parallel image transformation pipelinesMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2017·Granted Jul 23, 2019·4 cites·20 claims
- 1581US10410349B2Selective application of reprojection processing on layer sub-regions for optimizing late stage reprojection powerMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2017·Granted Sep 10, 2019·3 cites·21 claims
- 1681US10255891B2No miss cache structure for real-time image transformations with multiple LSR processing enginesMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2017·Granted Apr 9, 2019·3 cites·21 claims
- 1781US9092347B2Allocating cache for use as a dedicated local storageIBM·Filed 2012·Granted Jul 28, 2015·5 cites·16 claims
- 1877US8392664B2Network on chipCOMPARAN MIGUEL·Filed 2008·Granted Mar 5, 2013·8 cites·18 claims
- 1974US10241470B2No miss cache structure for real-time image transformations with data compressionMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2018·Granted Mar 26, 2019·1 cites·23 claims
- 2072US9021237B2Low latency variable transfer network communicating variable written to source processing core variable register allocated to destination thread to destination processing core variable register allocated to source threadCOMPARAN MIGUEL·Filed 2011·Granted Apr 28, 2015·3 cites·23 claims
- 2170US8560897B2Hard memory array failure recovery utilizing locking structureCOMPARAN MIGUEL·Filed 2010·Granted Oct 15, 2013·2 cites·17 claims
- 2269US8949836B2Transferring architected state between coresCOMPARAN MIGUEL·Filed 2011·Granted Feb 3, 2015·2 cites·13 claims
- 2365US10403029B2Methods and systems for multistage post-rendering image transformationMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2017·Granted Sep 3, 2019·1 cites·20 claims
- 2464US9053037B2Allocating cache for use as a dedicated local storageCOMPARAN MIGUEL·Filed 2011·Granted Jun 9, 2015·1 cites·13 claims
- 2562US8493398B2Dynamic data type aligned cache optimized for misaligned packed structuresCOMPARAN MIGUEL·Filed 2008·Granted Jul 23, 2013·2 cites·10 claims
- 2661US12048256B2Interfacing with superconducting circuitryMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2021·Granted Jul 23, 2024·0 cites·19 claims
- 2761US10831504B2Processor with hybrid pipeline capable of operating in out-of-order and in-order modesIBM·Filed 2018·Granted Nov 10, 2020·0 cites·17 claims
- 2854US10338816B2Reducing negative effects of insufficient data throughput for real-time processingMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2018·Granted Jul 2, 2019·0 cites·20 claims
- 2953US8954973B2Transferring architected state between coresIBM·Filed 2012·Granted Feb 10, 2015·0 cites·7 claims
- 3052US10095408B2Reducing negative effects of insufficient data throughput for real-time processingMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2017·Granted Oct 9, 2018·0 cites·20 claims
- 3152US2013173967A1Hard memory array failure recovery utilizing locking structureIBM·Filed 2013·Application pending·0 cites
- 3251US8719507B2Near neighbor data cache sharingCOMPARAN MIGUEL·Filed 2012·Granted May 6, 2014·0 cites·16 claims
- 3347US11218139B2Test and characterization of ring in superconducting domain through built-in self-testMUMFORD CLINT WAYNE·Filed 2020·Granted Jan 4, 2022·0 cites·20 claims
- 3447US2009245257A1Network On ChipIBM·Filed 2008·Application pending·0 cites
- 3542US10514753B2Selectively applying reprojection processing to multi-layer scenes for optimizing late stage reprojection powerMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2017·Granted Dec 24, 2019·0 cites·25 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →