Inventor · disambiguated record
Chad G. Wilson
Also filed as: WILSON CHAD G
10 granted patents·2 pending applications·9 citations·filing 2017–2022
82Inventor score
Files withIBM12
Top patents by PatentIndex Score
12 records- 0188US10055355B1Non-disruptive clearing of varying address ranges from cacheIBM·Filed 2017·Granted Aug 21, 2018·4 cites·1 claims
- 0284US11947418B2Remote access arrayIBM·Filed 2022·Granted Apr 2, 2024·1 cites·20 claims
- 0384US11868259B2System coherency protocolIBM·Filed 2022·Granted Jan 9, 2024·1 cites·21 claims
- 0478US10649908B2Non-disruptive clearing of varying address ranges from cacheIBM·Filed 2019·Granted May 12, 2020·1 cites·17 claims
- 0575US10437729B2Non-disruptive clearing of varying address ranges from cacheIBM·Filed 2017·Granted Oct 8, 2019·1 cites·12 claims
- 0664US2019251036A1Non-disruptive clearing of varying address ranges from cacheIBM·Filed 2019·Application pending·0 cites
- 0764US2019251037A1Non-disruptive clearing of varying address ranges from cacheIBM·Filed 2019·Application pending·0 cites
- 0858US10529396B2Preinstall of partial store cache linesIBM·Filed 2017·Granted Jan 7, 2020·1 cites·20 claims
- 0955US11687479B2System event broadcast synchronization across hierarchical interfacesIBM·Filed 2021·Granted Jun 27, 2023·0 cites·20 claims
- 1049US10901902B2Efficient inclusive cache managementIBM·Filed 2019·Granted Jan 26, 2021·0 cites·13 claims
- 1146US11099989B2Coherency maintenance via physical cache coordinate comparisonIBM·Filed 2019·Granted Aug 24, 2021·0 cites·20 claims
- 1246US10831661B2Coherent cache with simultaneous data requests in same addressable indexIBM·Filed 2019·Granted Nov 10, 2020·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →