Inventor · disambiguated record
Matthew R. Ellavsky
Also filed as: ELLAVSKY MATTHEW R · ELLAVSKY MATTHEW ROGER
12 granted patents·2 pending applications·192 citations·filing 2007–2015
90Inventor score
Top patents by PatentIndex Score
14 records- 0196US9971713B2Multi-petascale highly efficient parallel supercomputerGLOBALFOUNDRIES INC·Filed 2015·Granted May 15, 2018·30 cites·14 claims
- 0296US9081501B2Multi-petascale highly efficient parallel supercomputerASAAD SAMEH·Filed 2011·Granted Jul 14, 2015·115 cites·41 claims
- 0385US8140925B2Method and apparatus to debug an integrated circuit chip via synchronous clock stop and scanBELLOFATTO RALPH E·Filed 2007·Granted Mar 20, 2012·20 cites·29 claims
- 0481US8643421B1Implementing low power, single master-slave elastic bufferIBM·Filed 2013·Granted Feb 4, 2014·6 cites·17 claims
- 0574US8412974B2Global synchronization of parallel processors using clock pulse width modulationCHEN DONG·Filed 2010·Granted Apr 2, 2013·4 cites·21 claims
- 0673US7915929B2High-speed leaf clock frequency-divider/splitterIBM·Filed 2007·Granted Mar 29, 2011·6 cites·7 claims
- 0770US8689170B2Changing the location of a buffer bay in a netlistIBM·Filed 2013·Granted Apr 1, 2014·3 cites·14 claims
- 0870US8271912B2Radiation tolerance by clock signal interleavingELLAVSKY MATTHEW R·Filed 2008·Granted Sep 18, 2012·6 cites·19 claims
- 0964US8413104B2Changing the location of a buffer bay in a netlistELLAVSKY MATTHEW R·Filed 2011·Granted Apr 2, 2013·2 cites·6 claims
- 1051US8826214B2Implementing Z directional macro port assignmentIBM·Filed 2013·Granted Sep 2, 2014·0 cites·20 claims
- 1146US9087172B2Implementing enhanced net routing congestion resolution of non-rectangular or rectangular hierarchical macrosIBM·Filed 2013·Granted Jul 21, 2015·0 cites·20 claims
- 1246US2008172643A1High-Speed Leaf Clock Frequency-Divider/SplitterIBM·Filed 2007·Application pending·0 cites
- 1345US8448121B2Implementing Z directional macro port assignmentELLAVSKY MATTHEW R·Filed 2011·Granted May 21, 2013·0 cites·21 claims
- 1436US2009150103A1Computer-Based Method and System for Simulating Static Timing Clocking ResultsELLAVSKY MATTHEW ROGER·Filed 2007·Application pending·0 cites
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