Inventor · disambiguated record
Russell D. Hoover
Also filed as: HOOVER RUSSELL · HOOVER RUSSELL D · HOOVER RUSSELL DEAN
71 granted patents·15 pending applications·2,469 citations·filing 1990–2017
99Inventor score
Top patents by PatentIndex Score
86 records- 0199US8022950B2Stochastic culling of rays with increased depth of recursionIBM·Filed 2007·Granted Sep 20, 2011·134 cites·14 claims
- 0298US8736068B2Hybrid bonding techniques for multi-layer semiconductor stacksBARTLEY GERALD K·Filed 2012·Granted May 27, 2014·215 cites·11 claims
- 0398US8139060B2Ray tracing image processing systemBROWN JEFFREY DOUGLAS·Filed 2006·Granted Mar 20, 2012·140 cites·18 claims
- 0498US8085267B2Stochastic addition of rays in a ray tracing image processing systemBROWN JEFFREY DOUGLAS·Filed 2007·Granted Dec 27, 2011·138 cites·21 claims
- 0598US7940265B2Multiple spacial indexes for dynamic scene management in graphics renderingIBM·Filed 2006·Granted May 10, 2011·133 cites·19 claims
- 0696US8726295B2Network on chip with an I/O acceleratorIBM·Filed 2013·Granted May 13, 2014·40 cites·18 claims
- 0796US8438578B2Network on chip with an I/O acceleratorHOOVER RUSSELL D·Filed 2008·Granted May 7, 2013·47 cites·18 claims
- 0896US8020168B2Dynamic virtual software pipelining on a network on chipIBM·Filed 2008·Granted Sep 13, 2011·65 cites·20 claims
- 0995US9495498B2Universal inter-layer interconnect for multi-layer semiconductor stacksBARTLEY GERALD K·Filed 2012·Granted Nov 15, 2016·19 cites·16 claims
- 1095US8490110B2Network on chip with a low latency, high bandwidth application messaging interconnectHOOVER RUSSELL D·Filed 2008·Granted Jul 16, 2013·49 cites·16 claims
- 1195US7958340B2Monitoring software pipeline performance on a network on chipIBM·Filed 2008·Granted Jun 7, 2011·43 cites·16 claims
- 1295US6247100B1Method and system for transmitting address commands in a multiprocessor systemIBM·Filed 2000·Granted Jun 12, 2001·120 cites·8 claims
- 1394US6526469B1Bus architecture employing varying width uni-directional command busIBM·Filed 1999·Granted Feb 25, 2003·198 cites·10 claims
- 1493US7355601B2System and method for transfer of data between processors using a locked set, head and tail pointersIBM·Filed 2005·Granted Apr 8, 2008·36 cites·20 claims
- 1592US8445918B2Thermal enhancement for multi-layer semiconductor stacksBARTLEY GERALD K·Filed 2010·Granted May 21, 2013·17 cites·18 claims
- 1692US7917703B2Network on chip that maintains cache coherency with invalidate commandsIBM·Filed 2007·Granted Mar 29, 2011·29 cites·16 claims
- 1792US7913010B2Network on chip with a low latency, high bandwidth application messaging interconnectIBM·Filed 2008·Granted Mar 22, 2011·31 cites·16 claims
- 1891US8293578B2Hybrid bonding techniques for multi-layer semiconductor stacksBARTLEY GERALD K·Filed 2010·Granted Oct 23, 2012·11 cites·10 claims
- 1990US7818503B2Method and apparatus for memory utilizationIBM·Filed 2006·Granted Oct 19, 2010·17 cites·20 claims
- 2090US6557069B1Processor-memory bus architecture for supporting multiple processorsIBM·Filed 1999·Granted Apr 29, 2003·169 cites·15 claims
- 2189US8489787B2Sharing sampled instruction address registers for efficient instruction sampling in massively multithreaded processorsADAR ETAI·Filed 2010·Granted Jul 16, 2013·14 cites·14 claims
- 2289US8040799B2Network on chip with minimum guaranteed bandwidth for virtual communications channelsIBM·Filed 2008·Granted Oct 18, 2011·18 cites·9 claims
- 2389US8010750B2Network on chip that maintains cache coherency with invalidate commandsIBM·Filed 2008·Granted Aug 30, 2011·20 cites·16 claims
- 2487US5168571ASystem for aligning bytes of variable multi-bytes length operand based on alu byte length and a number of unprocessed byte dataIBM·Filed 1990·Granted Dec 1, 1992·161 cites·4 claims
- 2586US8214845B2Context switching in a network on chip by thread saving and restoring pointers to memory arrays containing valid message dataHOOVER RUSSELL D·Filed 2008·Granted Jul 3, 2012·14 cites·18 claims
- 2686US8018466B2Graphics rendering on a network on chipIBM·Filed 2008·Granted Sep 13, 2011·15 cites·20 claims
- 2785US7752413B2Method and apparatus for communicating between threadsIBM·Filed 2006·Granted Jul 6, 2010·11 cites·24 claims
- 2885US7305524B2Snoop filter directory mechanism in coherency shared memory systemIBM·Filed 2004·Granted Dec 4, 2007·37 cites·5 claims
- 2982US7852336B2Dynamic determination of optimal spatial index mapping to processor thread resourcesIBM·Filed 2006·Granted Dec 14, 2010·11 cites·17 claims
- 3081US9092347B2Allocating cache for use as a dedicated local storageIBM·Filed 2012·Granted Jul 28, 2015·5 cites·16 claims
- 3181US5805837AMethod for optimizing reissue commands in master-slave processing systemsIBM·Filed 1996·Granted Sep 8, 1998·96 cites·35 claims
- 3281US5604882ASystem and method for empty notification from peer cache units to global storage control unit in a multiprocessor data processing systemIBM·Filed 1993·Granted Feb 18, 1997·96 cites·16 claims
- 3380US7461268B2E-fuses for storing security version dataIBM·Filed 2004·Granted Dec 2, 2008·21 cites·5 claims
- 3479US7669013B2Directory for multi-node coherent busIBM·Filed 2007·Granted Feb 23, 2010·9 cites·20 claims
- 3577US8392664B2Network on chipCOMPARAN MIGUEL·Filed 2008·Granted Mar 5, 2013·8 cites·18 claims
- 3677US7996621B2Data cache invalidate with data dependent expiration using a step valueIBM·Filed 2007·Granted Aug 9, 2011·8 cites·20 claims
- 3777US7836258B2Dynamic data cache invalidate with data dependent expirationIBM·Filed 2006·Granted Nov 16, 2010·8 cites·20 claims
- 3874US8248402B2Adaptive ray data reorder for optimized ray temporal localityBROWN JEFFREY DOUGLAS·Filed 2006·Granted Aug 21, 2012·7 cites·19 claims
- 3973US8799188B2Algorithm engine for use in a pattern matching acceleratorBIRAN GIORA·Filed 2011·Granted Aug 5, 2014·7 cites·26 claims
- 4073US8526422B2Network on chip with partitionsHOOVER RUSSELL D·Filed 2007·Granted Sep 3, 2013·5 cites·15 claims
- 4173US8330489B2Universal inter-layer interconnect for multi-layer semiconductor stacksBARTLEY GERALD K·Filed 2009·Granted Dec 11, 2012·4 cites·22 claims
- 4273US8284195B2Cooperative utilization of spatial indices between application and rendering hardwareBROWN JEFFREY DOUGLAS·Filed 2007·Granted Oct 9, 2012·6 cites·18 claims
- 4373US5761721AMethod and system for cache coherence despite unordered interconnect transportIBM·Filed 1996·Granted Jun 2, 1998·67 cites·2 claims
- 4472US9021237B2Low latency variable transfer network communicating variable written to source processing core variable register allocated to destination thread to destination processing core variable register allocated to source threadCOMPARAN MIGUEL·Filed 2011·Granted Apr 28, 2015·3 cites·23 claims
- 4572US7873701B2Network on chip with partitionsIBM·Filed 2008·Granted Jan 18, 2011·5 cites·7 claims
- 4669US8949836B2Transferring architected state between coresCOMPARAN MIGUEL·Filed 2011·Granted Feb 3, 2015·2 cites·13 claims
- 4769US6088768AMethod and system for maintaining cache coherence in a multiprocessor-multicache environment having unordered communicationIBM·Filed 1993·Granted Jul 11, 2000·48 cites·15 claims
- 4868US8127079B2Intelligent cache injectionHEIL TIMOTHY H·Filed 2009·Granted Feb 28, 2012·4 cites·8 claims
- 4966US8259131B2Adaptive sub-sampling for reduction in issued raysBROWN JEFFREY DOUGLAS·Filed 2007·Granted Sep 4, 2012·4 cites·16 claims
- 5065US8773449B2Rendering of stereoscopic images with multithreaded rendering software pipelineHOOVER RUSSELL DEAN·Filed 2009·Granted Jul 8, 2014·5 cites·18 claims
Showing the top 50 of 86 patent records by PatentIndex Score.
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