Inventor · disambiguated record
Yuri Tkachev
Also filed as: TKACHEV YURI
13 granted patents·7 pending applications·361 citations·filing 2007–2024
91Inventor score
Top patents by PatentIndex Score
20 records- 0197US7927994B1Split gate non-volatile flash memory cell having a floating gate, control gate, select gate and an erase gate with an overhang over the floating gate, array and method of manufacturingSILICON STORAGE TECH INC·Filed 2010·Granted Apr 19, 2011·73 cites·6 claims
- 0297US7868375B2Split gate non-volatile flash memory cell having a floating gate, control gate, select gate and an erase gate with an overhang over the floating gate, array and method of manufacturingSILICON STORAGE TECH INC·Filed 2009·Granted Jan 11, 2011·230 cites·2 claims
- 0393US8711636B2Method of operating a split gate flash memory cell with coupling gateDO NHAN·Filed 2012·Granted Apr 29, 2014·27 cites·3 claims
- 0488US11018147B1Method of forming split gate memory cells with thinned tunnel oxideSILICON STORAGE TECH INC·Filed 2020·Granted May 25, 2021·3 cites·18 claims
- 0588US9245638B2Method of operating a split gate flash memory cell with coupling gateSILICON STORAGE TECH INC·Filed 2014·Granted Jan 26, 2016·11 cites·3 claims
- 0686US9123822B2Split gate non-volatile flash memory cell having a silicon-metal floating gate and method of making sameSILICON STORAGE TECH INC·Filed 2013·Granted Sep 1, 2015·10 cites·2 claims
- 0777US10714489B2Method of programming a split-gate flash memory cell with erase gateSILICON STORAGE TECH INC·Filed 2018·Granted Jul 14, 2020·2 cites·18 claims
- 0867US2022336020A1Ultra-precise tuning of neural memory cellsSILICON STORAGE TECH INC·Filed 2022·Application pending·0 cites
- 0965US9275748B2Low leakage, low threshold voltage, split-gate flash cell operationSILICON STORAGE TECH INC·Filed 2014·Granted Mar 1, 2016·2 cites·18 claims
- 1064US11393535B2Ultra-precise tuning of analog neural memory cells in a deep learning artificial neural networkSILICON STORAGE TECH INC·Filed 2020·Granted Jul 19, 2022·0 cites·23 claims
- 1161US9633735B2System and method to inhibit erasing of portion of sector of split gate flash memory cellsSILICON STORAGE TECH INC·Filed 2014·Granted Apr 25, 2017·2 cites·2 claims
- 1258US2025185523A1Low voltage resistive random access memory (rram) cells and method of formationSILICON STORAGE TECH INC·Filed 2024·Application pending·0 cites
- 1354US2025208774A1Programmable logic block comprising flash memory array to store configuration data for programmable logicSILICON STORAGE TECH INC·Filed 2024·Application pending·0 cites
- 1453US2024274591A1Semiconductor device with communication ringSILICON STORAGE TECH INC·Filed 2023·Application pending·0 cites
- 1549US2009039410A1Split Gate Non-Volatile Flash Memory Cell Having A Floating Gate, Control Gate, Select Gate And An Erase Gate With An Overhang Over The Floating Gate, Array And Method Of ManufacturingLIU XIAN·Filed 2007·Application pending·0 cites
- 1647US9466732B2Split-gate memory cell with depletion-mode floating gate channel, and method of making sameTKACHEV YURI·Filed 2012·Granted Oct 11, 2016·1 cites·18 claims
- 1747US2011127599A1Split Gate Non-volatile Flash Memory Cell Having A Floating Gate, Control Gate, Select Gate And An Erase Gate With An Overhang Over The Floating Gate, Array And Method Of ManufacturingLIU XIAN·Filed 2011·Application pending·0 cites
- 1846US2025285684A1Sequential erase for tuning the program state of non-volatile memory cellsSILICON STORAGE TECH INC·Filed 2024·Application pending·0 cites
- 1944US12020762B2Method of determining defective die containing non-volatile memory cellsSILICON STORAGE TECH INC·Filed 2022·Granted Jun 25, 2024·0 cites·15 claims
- 2043US11362218B2Method of forming split gate memory cells with thinned side edge tunnel oxideSILICON STORAGE TECH INC·Filed 2020·Granted Jun 14, 2022·0 cites·26 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →