Inventor · disambiguated record
Reid T. Copeland
Also filed as: COPELAND REID · COPELAND REID T
52 granted patents·7 pending applications·156 citations·filing 2007–2024
98Inventor score
Top patents by PatentIndex Score
59 records- 0196US11360769B1Decimal scale and convert and split to hexadecimal floating point instructionIBM·Filed 2021·Granted Jun 14, 2022·5 cites·20 claims
- 0291US8428930B2Page mapped spatially aware emulation of a computer instruction setBOHIZIC THEODORE J·Filed 2009·Granted Apr 23, 2013·26 cites·7 claims
- 0389US9563536B1Performance neutral isolation of runtime discrepancies in binary codeIBM·Filed 2015·Granted Feb 7, 2017·8 cites·20 claims
- 0489US9158566B2Page mapped spatially aware emulation of computer instruction setIBM·Filed 2012·Granted Oct 13, 2015·12 cites·14 claims
- 0589US8301434B2Host cell spatially aware emulation of a guest wild branchBOHIZIC THEODORE J·Filed 2009·Granted Oct 30, 2012·23 cites·22 claims
- 0686US9286190B2Inserting implicit sequence points into computer program code to support debug operationsIBM·Filed 2013·Granted Mar 15, 2016·8 cites·8 claims
- 0786US9274931B2Inserting implicit sequence points into computer program code to support debug operationsIBM·Filed 2013·Granted Mar 1, 2016·8 cites·15 claims
- 0885US9335993B2Convert from zoned format to decimal floating point formatCARLOUGH STEVEN R·Filed 2011·Granted May 10, 2016·6 cites·17 claims
- 0982US10430185B2Decimal load immediate instructionIBM·Filed 2017·Granted Oct 1, 2019·2 cites·11 claims
- 1081US11663004B2Vector convert hexadecimal floating point to scaled decimal instructionIBM·Filed 2021·Granted May 30, 2023·1 cites·25 claims
- 1181US10235170B2Decimal load immediate instructionIBM·Filed 2016·Granted Mar 19, 2019·2 cites·20 claims
- 1281US8768683B2Self initialized host cell spatially aware emulation of a computer instruction setIBM·Filed 2013·Granted Jul 1, 2014·5 cites·15 claims
- 1380US11442726B1Vector pack and unpack instructionsIBM·Filed 2021·Granted Sep 13, 2022·1 cites·25 claims
- 1480US10346134B2Perform sign operation decimal instructionIBM·Filed 2017·Granted Jul 9, 2019·2 cites·11 claims
- 1580US10235137B2Decimal shift and divide instructionIBM·Filed 2017·Granted Mar 19, 2019·2 cites·8 claims
- 1679US11068246B2Control flow graph analysisIBM·Filed 2018·Granted Jul 20, 2021·2 cites·20 claims
- 1778US11099853B2Digit validation check control in instruction executionIBM·Filed 2019·Granted Aug 24, 2021·2 cites·20 claims
- 1878US11023205B2Negative zero control in instruction executionIBM·Filed 2019·Granted Jun 1, 2021·2 cites·20 claims
- 1977US9329861B2Convert to zoned format from decimal floating point formatCARLOUGH STEVEN R·Filed 2011·Granted May 3, 2016·3 cites·15 claims
- 2077US8555266B2Managing variable assignments in a programCOPELAND REID T·Filed 2007·Granted Oct 8, 2013·13 cites·13 claims
- 2177US8447583B2Self initialized host cell spatially aware emulation of a computer instruction setBOHIZIC THEODORE J·Filed 2009·Granted May 21, 2013·7 cites·6 claims
- 2275US9335994B2Convert from zoned format to decimal floating point formatIBM·Filed 2014·Granted May 10, 2016·2 cites·10 claims
- 2371US10776255B1Automatic verification of optimization of high level constructs using test vectorsIBM·Filed 2019·Granted Sep 15, 2020·1 cites·25 claims
- 2471US10175946B2Perform sign operation decimal instructionIBM·Filed 2016·Granted Jan 8, 2019·1 cites·20 claims
- 2571US10127015B2Decimal multiply and shift instructionIBM·Filed 2016·Granted Nov 13, 2018·1 cites·20 claims
- 2671US9916143B2Inserting implicit sequence points into computer program code to support debug operationsIBM·Filed 2016·Granted Mar 13, 2018·1 cites·14 claims
- 2771US9910648B2Inserting implicit sequence points into computer program code to support debug operationsIBM·Filed 2016·Granted Mar 6, 2018·1 cites·7 claims
- 2871US8438340B2Executing atomic store disjoint instructionsBOHIZIC THEODORE J·Filed 2010·Granted May 7, 2013·3 cites·5 claims
- 2968US11003453B2Branch target buffer for emulation environmentsIBM·Filed 2019·Granted May 11, 2021·0 cites·20 claims
- 3065US12430127B1Vector test decimal instruction for validity testingIBM·Filed 2024·Granted Sep 30, 2025·0 cites·24 claims
- 3164US10990390B2Decimal load immediate instructionIBM·Filed 2019·Granted Apr 27, 2021·0 cites·20 claims
- 3263US9235420B2Branch target buffer for emulation environmentsIBM·Filed 2013·Granted Jan 12, 2016·1 cites·17 claims
- 3361US8612731B2Branch target buffer for emulation environmentsCAVANNA CARLOS·Filed 2009·Granted Dec 17, 2013·2 cites·9 claims
- 3461US8364461B2Reusing invalidated traces in a system emulatorIBM·Filed 2009·Granted Jan 29, 2013·2 cites·15 claims
- 3560US9335995B2Convert to zoned format from decimal floating point formatIBM·Filed 2014·Granted May 10, 2016·0 cites·9 claims
- 3659US10664252B2Inserting implicit sequence points into computer program code to support debug operationsIBM·Filed 2017·Granted May 26, 2020·0 cites·20 claims
- 3759US10534612B2Hybrid polymorphic inline cache and branch target buffer prediction units for indirect branch prediction for emulation environmentsIBM·Filed 2017·Granted Jan 14, 2020·0 cites·20 claims
- 3858US10725780B2Convert to zoned format from decimal floating point formatIBM·Filed 2016·Granted Jul 28, 2020·0 cites·10 claims
- 3958US10719324B2Convert to zoned format from decimal floating point formatIBM·Filed 2016·Granted Jul 21, 2020·0 cites·20 claims
- 4058US10331408B2Decimal multiply and shift instructionIBM·Filed 2017·Granted Jun 25, 2019·0 cites·10 claims
- 4158US10303478B2Convert from zoned format to decimal floating point formatIBM·Filed 2016·Granted May 28, 2019·0 cites·10 claims
- 4258US10296344B2Convert from zoned format to decimal floating point formatIBM·Filed 2016·Granted May 21, 2019·0 cites·20 claims
- 4358US2025328346A1Instruction with a preserve sign controlIBM·Filed 2024·Application pending·0 cites
- 4458US2025370748A1Convert instruction with overflow result controlIBM·Filed 2024·Application pending·0 cites
- 4557US2025307124A1Vector test zoned instruction for validity testingIBM·Filed 2024·Application pending·0 cites
- 4656US9626186B2Hybrid polymoprhic inline cache and branch target buffer prediction units for indirect branch prediction for emulation environmentsIBM·Filed 2016·Granted Apr 18, 2017·0 cites·14 claims
- 4755US10241757B2Decimal shift and divide instructionIBM·Filed 2016·Granted Mar 26, 2019·0 cites·12 claims
- 4855US9317292B2Hybrid polymorphic inline cache and branch target buffer prediction units for indirect branch prediction for emulation environmentsIBM·Filed 2013·Granted Apr 19, 2016·0 cites·7 claims
- 4955US8713289B2Efficiently emulating computer architecture condition code settings without executing branch instructionsCOPELAND REID T·Filed 2007·Granted Apr 29, 2014·1 cites·20 claims
- 5055US2016092163A1Machine instructions for converting from decimal floating point format to packed decimal formatIBM·Filed 2014·Application pending·0 cites
Showing the top 50 of 59 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →