Inventor · disambiguated record
Pouya Najafi Ashtiani
Also filed as: ASHTIANI POUYA · ASHTIANI POUYA NAJAFI
6 granted patents·3 pending applications·11 citations·filing 2009–2024
72Inventor score
Top patents by PatentIndex Score
9 records- 0190US11989050B2Multi-chiplet clock delay compensationADVANCED MICRO DEVICES INC·Filed 2021·Granted May 21, 2024·2 cites·20 claims
- 0272US2024419343A1Reducing power consumption associated with frequency transitioning in a memory interfaceADVANCED MICRO DEVICES INC·Filed 2024·Application pending·0 cites
- 0370US2024295898A1Multi-chiplet clock delay compensationADVANCED MICRO DEVICES INC·Filed 2024·Application pending·0 cites
- 0467US12079490B2Reducing power consumption associated with frequency transitioning in a memory interfaceADVANCED MICRO DEVICES INC·Filed 2021·Granted Sep 3, 2024·0 cites·24 claims
- 0562US8188615B2Integrated circuit adapted to be selectively AC or DC coupledDU YAMIN·Filed 2009·Granted May 29, 2012·9 cites·16 claims
- 0660US11947833B2Method and apparatus for training memoryADVANCED MICRO DEVICES INC·Filed 2022·Granted Apr 2, 2024·0 cites·18 claims
- 0755US11875875B2Variable tick for DRAM interface calibrationADVANCED MICRO DEVICES INC·Filed 2021·Granted Jan 16, 2024·0 cites·20 claims
- 0849US12437827B2DRAM specific interface calibration via programmable training sequencesADVANCED MICRO DEVICES INC·Filed 2021·Granted Oct 7, 2025·0 cites·20 claims
- 0941US2023197123A1Method and apparatus for performing a simulated write operationADVANCED MICRO DEVICES INC·Filed 2021·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →