Inventor · disambiguated record
Daniel Lavery
Also filed as: LAVERY DANIEL · LAVERY DANIEL M
17 granted patents·5 pending applications·180 citations·filing 1999–2016
93Inventor score
Technology areasG06F
Top patents by PatentIndex Score
22 records- 0187US8612949B2Methods and apparatuses for compiler-creating helper threads for multi-threadingLIAO SHIH-WEI·Filed 2009·Granted Dec 17, 2013·18 cites·12 claims
- 0280US7398521B2Methods and apparatuses for thread management of multi-threadingINTEL CORP·Filed 2004·Granted Jul 8, 2008·26 cites·14 claims
- 0372US7328433B2Methods and apparatus for reducing memory latency in a software applicationINTEL CORP·Filed 2003·Granted Feb 5, 2008·19 cites·34 claims
- 0467US7712091B2Method for predicate promotion in a software loopINTEL CORP·Filed 2005·Granted May 4, 2010·6 cites·11 claims
- 0567US7228528B2Building inter-block streams from a dynamic execution trace for a programINTEL CORP·Filed 2003·Granted Jun 5, 2007·13 cites·25 claims
- 0666US7051193B2Register rotation prediction and precomputationINTEL CORP·Filed 2001·Granted May 23, 2006·12 cites·34 claims
- 0764US8095920B2Post-pass binary adaptation for software-based speculative precomputationLIAO STEVE SHIH-WEI·Filed 2002·Granted Jan 10, 2012·11 cites·47 claims
- 0863US7243342B2Methods and apparatus for determining if a user-defined software function is a memory allocation function during compile-timeINTEL CORP·Filed 2002·Granted Jul 10, 2007·11 cites·24 claims
- 0963US6571385B1Early exit transformations for software pipeliningINTEL CORP·Filed 1999·Granted May 27, 2003·41 cites·18 claims
- 1062US7603546B2System, method and apparatus for dependency chain processingINTEL CORP·Filed 2004·Granted Oct 13, 2009·10 cites·22 claims
- 1159US7617495B2Resource-aware scheduling for compilersINTEL CORP·Filed 2004·Granted Nov 10, 2009·7 cites·24 claims
- 1258US8522220B2Post-pass binary adaptation for software-based speculative precomputationSHIH-WEI LIAO STEVE·Filed 2010·Granted Aug 27, 2013·2 cites·14 claims
- 1353US7127710B2Identifying pure pointers to disambiguate memory referencesINTEL CORP·Filed 2002·Granted Oct 24, 2006·4 cites·14 claims
- 1448US10061609B2Method and system using exceptions for code specialization in a computer architecture that supports transactionsINTEL CORP·Filed 2016·Granted Aug 28, 2018·0 cites·19 claims
- 1545US7774766B2Method and system for performing reassociation in software loopsINTEL CORP·Filed 2005·Granted Aug 10, 2010·0 cites·23 claims
- 1645US2005071438A1Methods and apparatuses for compiler-creating helper threads for multi-threadingFiled 2003·Application pending·0 cites
- 1745US2005071841A1Methods and apparatuses for thread management of mult-threadingFiled 2003·Application pending·0 cites
- 1841US9483275B2Method and system using exceptions for code specialization in a computer architecture that supports transactionsKRISHNASWAMY ARVIND·Filed 2011·Granted Nov 1, 2016·0 cites·15 claims
- 1940US2002199179A1Method and apparatus for compiler-generated triggering of auxiliary codesFiled 2001·Application pending·0 cites
- 2038US2004205740A1Method for collection of memory reference information and memory disambiguationFiled 2001·Application pending·0 cites
- 2135US2016285958A1Application container for live migration of mobile applicationsINTEL CORP·Filed 2015·Application pending·0 cites
- 2233US9141362B2Method and apparatus to schedule store instructions across atomic regions in binary translationMA GUOKAI·Filed 2012·Granted Sep 22, 2015·0 cites·18 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →