Inventor · disambiguated record
Roy B. Chung
Also filed as: CHUNG ROY B
5 granted patents·3 pending applications·29 citations·filing 2009–2012
78Inventor score
Top patents by PatentIndex Score
8 records- 0188US8299452B2Method for fabrication of semipolar (Al, In, Ga, B)N based light emitting diodesSATO HITOSHI·Filed 2012·Granted Oct 30, 2012·7 cites·21 claims
- 0284US8653503B2Optoelectronic device based on non-polar and semi-polar aluminum indium nitride and aluminum indium gallium nitride alloysUNIV CALIFORNIA·Filed 2012·Granted Feb 18, 2014·3 cites·20 claims
- 0384US8148713B2Method for fabrication of semipolar (Al, In, Ga, B)N based light emitting diodesSATO HITOSHI·Filed 2009·Granted Apr 3, 2012·10 cites·14 claims
- 0480US8084763B2Optoelectronic device based on non-polar and semi-polar aluminum indium nitride and aluminum indium gallium nitride alloysCHUNG ROY B·Filed 2009·Granted Dec 27, 2011·8 cites·23 claims
- 0573US8357925B2Optoelectronic device based on non-polar and semi-polar aluminum indium nitride and aluminum indium gallium nitride alloysUNIV CALIFORNIA·Filed 2011·Granted Jan 22, 2013·1 cites·27 claims
- 0648US2009310640A1MOCVD GROWTH TECHNIQUE FOR PLANAR SEMIPOLAR (Al, In, Ga, B)N BASED LIGHT EMITTING DIODESUNIV CALIFORNIA·Filed 2009·Application pending·0 cites
- 0735US2012138986A1Method for fabrication of (al,in,ga) nitride based vertical light emitting diodes with enhanced current spreading of n-type electrodeCHUNG ROY B·Filed 2011·Application pending·0 cites
- 0835US2012138891A1METHOD FOR REDUCTION OF EFFICIENCY DROOP USING AN (Al,In,Ga)N/Al(x)In(1-x)N SUPERLATTICE ELECTRON BLOCKING LAYER IN NITRIDE BASED LIGHT EMITTING DIODESCHUNG ROY B·Filed 2011·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Roy B. Chung files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →