Inventor · disambiguated record
James M. Larnerd
Also filed as: LARNERD JAMES M
12 granted patents·100 citations·filing 1987–2008
90Inventor score
Top patents by PatentIndex Score
12 records- 0191US7348677B2Method of providing printed circuit board with conductive holes and board resulting therefromENDICOTT INTERCONNECT TECH INC·Filed 2006·Granted Mar 25, 2008·19 cites·16 claims
- 0281US7211289B2Method of making multilayered printed circuit board with filled conductive holesENDICOTT INTERCONNECT TECH INC·Filed 2003·Granted May 1, 2007·21 cites·10 claims
- 0374US7377033B2Method of making circuitized substrate with split conductive layer and information handling system utilizing sameENDICOTT INTERCONNECT TECH INC·Filed 2006·Granted May 27, 2008·4 cites·13 claims
- 0466US7157646B2Circuitized substrate with split conductive layer, method of making same, electrical assembly utilizing same, and information handling system utilizing sameENDICOTT INTERCONNECT TECH INC·Filed 2004·Granted Jan 2, 2007·9 cites·24 claims
- 0555US4799616ASolder leveling method and apparatusIBM·Filed 1987·Granted Jan 24, 1989·14 cites·13 claims
- 0653US4869418ASolder leveling method and apparatusIBM·Filed 1988·Granted Sep 26, 1989·13 cites·15 claims
- 0750US7491896B2Information handling system utilizing circuitized substrate with split conductive layerENDICOTT INTERCONNECT TECH INC·Filed 2008·Granted Feb 17, 2009·0 cites·4 claims
- 0848US7814649B2Method of making circuitized substrate with filled isolation borderENDICOTT INTERCONNECT TECH INC·Filed 2006·Granted Oct 19, 2010·0 cites·6 claims
- 0948US7157647B2Circuitized substrate with filled isolation border, method of making same, electrical assembly utilizing same, and information handling system utilizing sameENDICOTT INTERCONNECT TECH INC·Filed 2004·Granted Jan 2, 2007·2 cites·24 claims
- 1045US6483046B1Circuit board having burr free castellated plated through holesIBM·Filed 2000·Granted Nov 19, 2002·1 cites·15 claims
- 1144US6105246AMethod of making a circuit board having burr free castellated plated through holesIBM·Filed 1999·Granted Aug 22, 2000·9 cites·8 claims
- 1236US4979862AAutomatic loading mechanismIBM·Filed 1988·Granted Dec 25, 1990·8 cites·17 claims
Join the waitlist — get patent alerts
Get an alert when James M. Larnerd files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →