Inventor · disambiguated record
Trung Q. Duong
Also filed as: DUONG TRUNG · DUONG TRUNG Q
4 granted patents·4 citations·filing 2007–2018
58Inventor score
Technology areasH10W
Top patents by PatentIndex Score
4 records- 0175US9502363B2Wafer level packages and methods for producing wafer level packages having delamination-resistant redistribution layersVINCENT MICHAEL B·Filed 2014·Granted Nov 22, 2016·4 cites·16 claims
- 0244US10431534B2Package with support structureNXP USA INC·Filed 2018·Granted Oct 1, 2019·0 cites·20 claims
- 0344US9281293B2Microelectronic packages having layered interconnect structures and methods for the manufacture thereofMAGNUS ALAN J·Filed 2013·Granted Mar 8, 2016·0 cites·20 claims
- 0436US7834466B2Semiconductor die with die pad patternFREESCALE SEMICONDUCTOR INC·Filed 2007·Granted Nov 16, 2010·0 cites·14 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →