Inventor · disambiguated record
Jayabrata Ghosh Dastidar
Also filed as: DASTIDAR JAYABRATA GHOSH
16 granted patents·185 citations·filing 2002–2012
94Inventor score
Top patents by PatentIndex Score
16 records- 0188US7373621B1Constraint-driven test generation for programmable logic device integrated circuitsALTERA CORP·Filed 2005·Granted May 13, 2008·22 cites·22 claims
- 0288US7111213B1Failure isolation and repair techniques for integrated circuitsALTERA CORP·Filed 2002·Granted Sep 19, 2006·38 cites·26 claims
- 0383US8004915B1Area-efficient memory built-in-self-test circuitry with advanced debug capabilities for distributed memory blocksALTERA CORP·Filed 2009·Granted Aug 23, 2011·14 cites·20 claims
- 0481US8327199B1Integrated circuit with configurable test pinsDASTIDAR JAYABRATA GHOSH·Filed 2010·Granted Dec 4, 2012·7 cites·20 claims
- 0578US8952713B1Method and apparatus for die testingDASTIDAR JAYABRATA GHOSH·Filed 2012·Granted Feb 10, 2015·7 cites·17 claims
- 0676US7339816B1Soft error tolerance for configuration memory in programmable devicesALTERA CORP·Filed 2006·Granted Mar 4, 2008·10 cites·23 claims
- 0775US7707472B1Method and apparatus for routing efficient built-in self test for on-chip circuit blocksALTERA CORP·Filed 2004·Granted Apr 27, 2010·23 cites·16 claims
- 0871US8259522B1Area-efficient memory built-in-self-test circuitry with advanced debug capabilities for distributed memory blocksDASTIDAR JAYABRATA GHOSH·Filed 2011·Granted Sep 4, 2012·4 cites·18 claims
- 0969US7062685B1Techniques for providing early failure warning of a programmable circuitALTERA CORP·Filed 2002·Granted Jun 13, 2006·14 cites·27 claims
- 1068US7058534B1Method and apparatus for application specific test of PLDsALTERA CORP·Filed 2003·Granted Jun 6, 2006·13 cites·21 claims
- 1164US7502979B2Pipelined scan structures for testing embedded coresALTERA CORP·Filed 2005·Granted Mar 10, 2009·4 cites·28 claims
- 1264US7024327B1Techniques for automatically generating tests for programmable circuitsALTERA CORP·Filed 2002·Granted Apr 4, 2006·11 cites·14 claims
- 1363US7299390B1Apparatus and method for encrypting security sensitive dataALTERA CORP·Filed 2005·Granted Nov 20, 2007·4 cites·20 claims
- 1460US7409669B1Automatic test configuration generation facilitating repair of programmable circuitsALTERA CORP·Filed 2003·Granted Aug 5, 2008·9 cites·9 claims
- 1549US7131043B1Automatic testing for programmable networks of control signalsALTERA CORP·Filed 2003·Granted Oct 31, 2006·4 cites·20 claims
- 1647US7212032B1Method and apparatus for monitoring yield of integrated circuitsALTERA CORP·Filed 2006·Granted May 1, 2007·1 cites·18 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →