Inventor · disambiguated record
Bethann Rainey
Also filed as: RAINEY BETHANN
24 granted patents·1 pending application·894 citations·filing 2002–2011
96Inventor score
Top patents by PatentIndex Score
25 records- 0198US7115920B2FinFET transistor and circuitIBM·Filed 2004·Granted Oct 3, 2006·175 cites·6 claims
- 0298US6794718B2High mobility crystalline planes in double-gate CMOS technologyIBM·Filed 2002·Granted Sep 21, 2004·263 cites·43 claims
- 0396US6909147B2Multi-height FinFETSIBM·Filed 2003·Granted Jun 21, 2005·171 cites·35 claims
- 0494US6888199B2High-density split-gate FinFETIBM·Filed 2003·Granted May 3, 2005·77 cites·21 claims
- 0591US8021943B2Simultaneously formed isolation trench and through-box contact for silicon-on-insulator technologyIBM·Filed 2009·Granted Sep 20, 2011·22 cites·18 claims
- 0691US7288802B2Virtual body-contacted trigateIBM·Filed 2005·Granted Oct 30, 2007·18 cites·23 claims
- 0791US6992354B2FinFET having suppressed parasitic device characteristicsIBM·Filed 2003·Granted Jan 31, 2006·54 cites·13 claims
- 0880US7700446B2Virtual body-contacted trigateIBM·Filed 2007·Granted Apr 20, 2010·7 cites·19 claims
- 0979US8748285B2Noble gas implantation region in top silicon layer of semiconductor-on-insulator substrateBOTULA ALAN B·Filed 2011·Granted Jun 10, 2014·5 cites·12 claims
- 1079US7904868B2Structures including means for lateral current carrying capability improvement in semiconductor devicesIBM·Filed 2007·Granted Mar 8, 2011·8 cites·7 claims
- 1179US7390721B2Methods of base formation in a BiCMOS processIBM·Filed 2005·Granted Jun 24, 2008·6 cites·12 claims
- 1278US8778737B2Flattened substrate surface for substrate bondingCOONEY III EDWARD C·Filed 2011·Granted Jul 15, 2014·4 cites·22 claims
- 1376US6965133B2Method of base formation in a BiCMOS processIBM·Filed 2004·Granted Nov 15, 2005·16 cites·9 claims
- 1476US6953726B2High-density split-gate FinFETIBM·Filed 2004·Granted Oct 11, 2005·17 cites·20 claims
- 1575US7368355B2FinFET transistor and circuitIBM·Filed 2006·Granted May 6, 2008·4 cites·6 claims
- 1675US6869852B1Self-aligned raised extrinsic base bipolar transistor structure and methodIBM·Filed 2004·Granted Mar 22, 2005·20 cites·14 claims
- 1774US7453151B2Methods for lateral current carrying capability improvement in semiconductor devicesIBM·Filed 2006·Granted Nov 18, 2008·5 cites·6 claims
- 1874US7087506B2Method of forming freestanding semiconductor layerIBM·Filed 2003·Granted Aug 8, 2006·13 cites·20 claims
- 1973US7709892B2Semiconductor device having freestanding semiconductor layerIBM·Filed 2006·Granted May 4, 2010·3 cites·6 claims
- 2072US7470578B2Method of making a finFET having suppressed parasitic device characteristicsIBM·Filed 2005·Granted Dec 30, 2008·4 cites·20 claims
- 2165US7964466B2FinFET transistor and circuitIBM·Filed 2010·Granted Jun 21, 2011·1 cites·20 claims
- 2254US8227318B2Integration of multiple gate oxides with shallow trench isolation methods to minimize divot formationLEVY MAX·Filed 2009·Granted Jul 24, 2012·1 cites·10 claims
- 2353US7777276B2FinFET transistor and circuitIBM·Filed 2008·Granted Aug 17, 2010·0 cites·16 claims
- 2451US2008308940A1Lateral current carrying capability improvement in semiconductor devicesFEILCHENFELD NATALIE BARBARA·Filed 2008·Application pending·0 cites
- 2544US7814454B2Selectable device options for characterizing semiconductor devicesIBM·Filed 2007·Granted Oct 12, 2010·0 cites·31 claims
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