Inventor · disambiguated record
Naveen Prabhu Vittal Prabhu
Also filed as: VITTAL PRABHU NAVEEN · VITTAL PRABHU NAVEEN PRABHU
6 granted patents·5 pending applications·3 citations·filing 2017–2025
69Inventor score
Top patents by PatentIndex Score
11 records- 0175US2025308602A1Independent Multi-Page Read Operation Enhancement TechnologyIntel NDTM US LLC·Filed 2025·Application pending·0 cites
- 0275US2025383821A1Lean command sequence for multi-plane read operationsIntel NDTM US LLC·Filed 2025·Application pending·0 cites
- 0369US10438656B2System and method for performing a concurrent multiple page read of a memory arrayINTEL CORP·Filed 2017·Granted Oct 8, 2019·2 cites·23 claims
- 0469US10268407B1Method and apparatus for specifying read voltage offsets for a read commandINTEL CORP·Filed 2017·Granted Apr 23, 2019·1 cites·20 claims
- 0563US12468484B2Express status operation for storage devices with independent planes and plane groupsIntel NDTM US LLC·Filed 2023·Granted Nov 11, 2025·0 cites·20 claims
- 0661US12393367B2Lean command sequence for multi-plane read operationsIntel NDTM US LLC·Filed 2021·Granted Aug 19, 2025·0 cites·16 claims
- 0756US12360669B2Method and apparatus to reduce memory in a NAND flash device to store page related informationIntel NDTM US LLC·Filed 2023·Granted Jul 15, 2025·0 cites·20 claims
- 0849US2023376215A1Multi-deck nand memory with hybrid deck slcIntel NDTM US LLC·Filed 2022·Application pending·0 cites
- 0944US11061762B2Memory programming techniquesINTEL CORP·Filed 2019·Granted Jul 13, 2021·0 cites·19 claims
- 1042US2023229350A1Early read operation for storage devices with independent planes and plane groupsIntel NDTM US LLC·Filed 2023·Application pending·0 cites
- 1140US2019042130A1Prefix opcode method for slc entry with auto-exit optionINTEL CORP·Filed 2017·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →