Inventor · disambiguated record
Edward S. Mcgettigan
Also filed as: MCGETTIGAN EDWARD · MCGETTIGAN EDWARD S · MCGETTIGAN JR EDWARD
11 granted patents·1 pending application·546 citations·filing 1997–2024
93Inventor score
Top patents by PatentIndex Score
12 records- 0197US6685766B2Corrosion inhibitor for steel-reinforced concreteDEGUSSA·Filed 2002·Granted Feb 3, 2004·57 cites·30 claims
- 0295US7024651B1Partial reconfiguration of a programmable gate array using a bus macroXILINX INC·Filed 2002·Granted Apr 4, 2006·66 cites·9 claims
- 0395US6462579B1Partial reconfiguration of a programmable gate array using a bus macroXILINX INC·Filed 2001·Granted Oct 8, 2002·70 cites·8 claims
- 0492US6384627B1Logic block used as dynamically configurable logic functionXILINX INC·Filed 2001·Granted May 7, 2002·58 cites·21 claims
- 0590US7102555B2Boundary-scan circuit used for analog and digital testing of an integrated circuitXILINX INC·Filed 2004·Granted Sep 5, 2006·60 cites·25 claims
- 0688US8104012B1System and methods for reducing clock power in integrated circuitsKLEIN MATTHEW H·Filed 2009·Granted Jan 24, 2012·21 cites·20 claims
- 0788US6157209ALoadable up-down counter with asynchronous resetXILINX INC·Filed 1998·Granted Dec 5, 2000·59 cites·7 claims
- 0886US6732347B1Clock template for configuring a programmable gate arrayXILINX INC·Filed 2001·Granted May 4, 2004·62 cites·21 claims
- 0974US7669163B1Partial configuration of a programmable gate array using a bus macro and coupling the third designXILINX INC·Filed 2006·Granted Feb 23, 2010·6 cites·6 claims
- 1071US6086629AMethod for design implementation of routing in an FPGA using placement directives such as local outputs and virtual buffersXILINX INC·Filed 1997·Granted Jul 11, 2000·70 cites·16 claims
- 1170US7085706B1Systems and methods of utilizing virtual input and output modules in a programmable logic deviceXILINX INC·Filed 2003·Granted Aug 1, 2006·17 cites·41 claims
- 1259US2025064603A1Expandable trial femoral neck and associated method of useGLOBUS MEDICAL INC·Filed 2024·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →