Inventor · disambiguated record
Jason N. Dale
Also filed as: DALE JASON · DALE JASON N · DALE JASON NATHANIEL
20 granted patents·8 pending applications·221 citations·filing 2000–2020
94Inventor score
Top patents by PatentIndex Score
28 records- 0193US7284112B2Multiple page size address translation incorporating page size predictionIBM·Filed 2005·Granted Oct 16, 2007·35 cites·1 claims
- 0290US7774616B2Masking a boot sequence by providing a dummy processorIBM·Filed 2006·Granted Aug 10, 2010·23 cites·11 claims
- 0389US7159095B2Method of efficiently handling multiple page sizes in an effective to real address translation (ERAT) tableIBM·Filed 2003·Granted Jan 2, 2007·62 cites·4 claims
- 0488US7594104B2System and method for masking a hardware boot sequenceIBM·Filed 2006·Granted Sep 22, 2009·18 cites·3 claims
- 0587US7779273B2Booting a multiprocessor device based on selection of encryption keys to be provided to processorsIBM·Filed 2008·Granted Aug 17, 2010·17 cites·20 claims
- 0676US6681321B1Method system and apparatus for instruction execution tracing with out of order processorsIBM·Filed 2000·Granted Jan 20, 2004·28 cites·43 claims
- 0774US9465744B2Data prefetch ramp implemenation based on memory utilizationIBM·Filed 2014·Granted Oct 11, 2016·3 cites·9 claims
- 0873US8244979B2System and method for cache-locking mechanism using translation table attributes for replacement class ID determinationBURNS ADAM PATRICK·Filed 2007·Granted Aug 14, 2012·8 cites·17 claims
- 0973US7739477B2Multiple page size address translation incorporating page size predictionIBM·Filed 2007·Granted Jun 15, 2010·5 cites·27 claims
- 1070US8046574B2Secure boot across a plurality of processorsIBM·Filed 2008·Granted Oct 25, 2011·4 cites·16 claims
- 1170US7774617B2Masking a boot sequence by providing a dummy processorIBM·Filed 2008·Granted Aug 10, 2010·4 cites·15 claims
- 1269US8046573B2Masking a hardware boot sequenceIBM·Filed 2008·Granted Oct 25, 2011·3 cites·20 claims
- 1366US8037293B2Selecting a random processor to boot on a multiprocessor systemIBM·Filed 2008·Granted Oct 11, 2011·3 cites·20 claims
- 1464US8918552B2Managing misaligned DMA addressesBELLOWS GREGORY HOWARD·Filed 2008·Granted Dec 23, 2014·3 cites·19 claims
- 1560US8904064B2Managing an out-of-order asynchronous heterogeneous remote direct memory access (RDMA) message queueBELLOWS GREGORY HOWARD·Filed 2008·Granted Dec 2, 2014·2 cites·18 claims
- 1656US8856453B2Persistent prefetch data stream settingsDALE JASON N·Filed 2012·Granted Oct 7, 2014·1 cites·20 claims
- 1751US7454602B2Pipeline having bifurcated global branch history buffer for indexing branch history table per instruction fetch groupIBM·Filed 2004·Granted Nov 18, 2008·2 cites·5 claims
- 1851US2008201563A1Apparatus for Improving Single Thread Performance through Speculative ProcessingIBM·Filed 2008·Application pending·0 cites
- 1948US11422822B2Multi-channel data path circuitryAPPLE INC·Filed 2020·Granted Aug 23, 2022·0 cites·18 claims
- 2045US8099579B2System and method for cache-locking mechanism using segment table attributes for replacement class ID determinationBURNS ADAM PATRICK·Filed 2007·Granted Jan 17, 2012·0 cites·20 claims
- 2144US8316207B2Assigning efficiently referenced globally unique identifiers in a multi-core environmentBELLOWS GREG H·Filed 2009·Granted Nov 20, 2012·0 cites·18 claims
- 2242US2007288738A1System and method for selecting a random processor to boot on a multiprocessor systemDALE JASON N·Filed 2006·Application pending·0 cites
- 2342US2007288761A1System and method for booting a multiprocessor device based on selection of encryption keys to be provided to processorsDALE JASON N·Filed 2006·Application pending·0 cites
- 2442US2007288740A1System and method for secure boot across a plurality of processorsDALE JASON N·Filed 2006·Application pending·0 cites
- 2541US2007113055A1Apparatus and method for improving single thread performance through speculative processingDALE JASON N·Filed 2005·Application pending·0 cites
- 2637US2007288739A1System and method for masking a boot sequence by running different code on each processorDALE JASON N·Filed 2006·Application pending·0 cites
- 2737US2022228843A1Video replayFLIGHT PATH IP LTD·Filed 2020·Application pending·0 cites
- 2836US2007113056A1Apparatus and method for using multiple thread contexts to improve single thread performanceDALE JASON N·Filed 2005·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →