Inventor · disambiguated record
William Stonecypher
Also filed as: CHING MICHAEL TAK-KEI · STONECYPHER WILLIAM · STONECYPHER WILLIAM F · STONECYPHER WILLIAM FRANKLIN
32 granted patents·5 pending applications·1,499 citations·filing 1998–2022
98Inventor score
Top patents by PatentIndex Score
37 records- 0199US7490275B2Method and apparatus for evaluating and optimizing a signaling systemRAMBUS INC·Filed 2006·Granted Feb 10, 2009·146 cites·19 claims
- 0297US7142612B2Method and apparatus for multi-level signalingRAMBUS INC·Filed 2001·Granted Nov 28, 2006·193 cites·48 claims
- 0396US6873939B1Method and apparatus for evaluating and calibrating a signaling systemRAMBUS INC·Filed 2001·Granted Mar 29, 2005·132 cites·23 claims
- 0496US6094075ACurrent control techniqueRAMBUS INC·Filed 1998·Granted Jul 25, 2000·114 cites·33 claims
- 0595US6462591B2Semiconductor memory device having a controlled output driver characteristicRAMBUS INC·Filed 2001·Granted Oct 8, 2002·115 cites·41 claims
- 0694US7308058B2Transparent multi-mode PAM interfaceRAMBUS INC·Filed 2004·Granted Dec 11, 2007·105 cites·55 claims
- 0794US7137048B2Method and apparatus for evaluating and optimizing a signaling systemRAMBUS INC·Filed 2001·Granted Nov 14, 2006·60 cites·22 claims
- 0894US6608507B2Memory system including a memory device having a controlled output driver characteristicRAMBUS INC·Filed 2002·Granted Aug 19, 2003·91 cites·45 claims
- 0993US8069378B2Method and apparatus for evaluating and optimizing a signaling systemZERBE JARED·Filed 2010·Granted Nov 29, 2011·8 cites·34 claims
- 1093US6556052B2Semiconductor controller device having a controlled output driver characteristicRAMBUS INC·Filed 2001·Granted Apr 29, 2003·68 cites·40 claims
- 1192US9892771B2Memory controller with dynamic core-transfer latencyRAMBUS INC·Filed 2015·Granted Feb 13, 2018·10 cites·20 claims
- 1291US6473439B1Method and apparatus for fail-safe resynchronization with minimum latencyRAMBUS INC·Filed 1998·Granted Oct 29, 2002·140 cites·22 claims
- 1390US7076377B2Circuit, apparatus and method for capturing a representation of a waveform from a clock-data recovery (CDR) unitRAMBUS INC·Filed 2003·Granted Jul 11, 2006·40 cites·12 claims
- 1490US6949958B2Phase comparator capable of tolerating a non-50% duty-cycle clocksRAMBUS INC·Filed 2002·Granted Sep 27, 2005·52 cites·5 claims
- 1590US6870419B1Memory system including a memory device having a controlled output driver characteristicRAMBUS INC·Filed 2003·Granted Mar 22, 2005·45 cites·42 claims
- 1690US6294934B1Current control techniqueRAMBUS INC·Filed 2000·Granted Sep 25, 2001·47 cites·31 claims
- 1787US9368172B2Read strobe gating mechanismRAMBUS INC·Filed 2014·Granted Jun 14, 2016·9 cites·20 claims
- 1886US7288973B2Method and apparatus for fail-safe resynchronization with minimum latencyRAMBUS INC·Filed 2005·Granted Oct 30, 2007·11 cites·22 claims
- 1986US7113550B2Technique for improving the quality of digital signals in a multi-level signaling systemRAMBUS INC·Filed 2002·Granted Sep 26, 2006·46 cites·53 claims
- 2082US7765074B2Circuit, apparatus and method for capturing a representation of a waveform from a clock-data recovery (CDR) unitRAMBUS INC·Filed 2006·Granted Jul 27, 2010·11 cites·20 claims
- 2178US7180958B2Technique for utilizing spare bandwidth resulting from the use of a transition-limiting code in a multi-level signaling systemRAMBUS INC·Filed 2004·Granted Feb 20, 2007·17 cites·45 claims
- 2277US7360127B2Method and apparatus for evaluating and optimizing a signaling systemRAMBUS INC·Filed 2006·Granted Apr 15, 2008·5 cites·18 claims
- 2375US9356743B2Method and apparatus for evaluating and optimizing a signaling systemRAMBUS INC·Filed 2014·Granted May 31, 2016·1 cites·20 claims
- 2474US8756469B2Method and apparatus for evaluating and optimizing a signaling systemRAMBUS INC·Filed 2013·Granted Jun 17, 2014·1 cites·20 claims
- 2574US7162672B2Multilevel signal interface testing with binary test apparatus by emulation of multilevel signalsRAMBUS INC·Filed 2001·Granted Jan 9, 2007·21 cites·26 claims
- 2666US7167039B2Memory device having an adjustable voltage swing settingRAMBUS INC·Filed 2004·Granted Jan 23, 2007·6 cites·52 claims
- 2765US10855413B2Method and apparatus for evaluating and optimizing a signaling systemRAMBUS INC·Filed 2016·Granted Dec 1, 2020·0 cites·20 claims
- 2864US2007151193A1TrusseesSTONECYPHER WILLIAM·Filed 2007·Application pending·0 cites
- 2963US11677391B1Low-power multi-domain synchronizerRAMBUS INC·Filed 2022·Granted Jun 13, 2023·0 cites·21 claims
- 3061US7180957B2Technique for utilizing spare bandwidth resulting from the use of a transition-limiting code in a multi-level signaling systemRAMBUS INC·Filed 2003·Granted Feb 20, 2007·4 cites·49 claims
- 3160US8812919B2Method and apparatus for evaluating and optimizing a signaling systemRAMBUS INC·Filed 2013·Granted Aug 19, 2014·0 cites·24 claims
- 3257US8812918B2Method and apparatus for evaluating and optimizing a signaling systemZERBE JARED·Filed 2011·Granted Aug 19, 2014·0 cites·32 claims
- 3355US2004244327A1TrussesFiled 2004·Application pending·0 cites
- 3451US7352234B2Current control techniqueRAMBUS INC·Filed 2007·Granted Apr 1, 2008·1 cites·17 claims
- 3546US2007165472A1Method and apparatus for evaluating and optimizing a signaling systemRAMBUS INC·Filed 2007·Application pending·0 cites
- 3643US2006242483A1Built-in self-testing of multilevel signal interfacesRAMBUS INC·Filed 2006·Application pending·0 cites
- 3734US2003070126A1Built-in self-testing of multilevel signal interfacesFiled 2001·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →