Inventor · disambiguated record
George Paulik
Also filed as: PAULIK GEORGE · PAULIK GEORGE F · PAULIK GEORGE FRANCIS
26 granted patents·8 pending applications·66 citations·filing 2005–2024
94Inventor score
Top patents by PatentIndex Score
34 records- 0194US10043568B1Optimizing data approximation analysis using low power circuitryIBM·Filed 2017·Granted Aug 7, 2018·11 cites·7 claims
- 0293US10037792B1Optimizing data approximation analysis using low power circuitryIBM·Filed 2017·Granted Jul 31, 2018·11 cites·13 claims
- 0392US10598710B2Cognitive analysis using applied analog circuitsIBM·Filed 2017·Granted Mar 24, 2020·4 cites·13 claims
- 0488US10592209B1Charge-scaling multiplier circuitIBM·Filed 2018·Granted Mar 17, 2020·6 cites·20 claims
- 0584US10236050B2Optimizing data approximation analysis using low power circuitryIBM·Filed 2018·Granted Mar 19, 2019·4 cites·13 claims
- 0684US10224089B2Optimizing data approximation analysis using low bower circuitryIBM·Filed 2018·Granted Mar 5, 2019·4 cites·7 claims
- 0778US10659258B1Matching transmitter impedance to receiver termination using an average of transmitter output voltage samplesIBM·Filed 2018·Granted May 19, 2020·3 cites·18 claims
- 0878US8780604B2State sensing system for eFuse memoryLIAO CHIHHUNG·Filed 2012·Granted Jul 15, 2014·9 cites·20 claims
- 0977US10348320B1Charge-scaling adder circuitIBM·Filed 2018·Granted Jul 9, 2019·3 cites·20 claims
- 1076US11695424B2Distortion reduction circuitIBM·Filed 2021·Granted Jul 4, 2023·1 cites·17 claims
- 1169US10671348B2Charge-scaling multiplier circuit with dual scaled capacitor setsIBM·Filed 2018·Granted Jun 2, 2020·1 cites·20 claims
- 1269US7506282B2Apparatus and methods for predicting and/or calibrating memory yieldsIBM·Filed 2005·Granted Mar 17, 2009·4 cites·20 claims
- 1364US12322912B2Plug count limiter for cablesIBM·Filed 2023·Granted Jun 3, 2025·0 cites·20 claims
- 1464US10658993B2Charge-scaling multiplier circuit with digital-to-analog converterIBM·Filed 2018·Granted May 19, 2020·1 cites·20 claims
- 1562US10670642B2Real time cognitive monitoring of correlations between variablesIBM·Filed 2017·Granted Jun 2, 2020·0 cites·7 claims
- 1660US10663502B2Real time cognitive monitoring of correlations between variablesIBM·Filed 2017·Granted May 26, 2020·0 cites·13 claims
- 1759US11990949B2Radio frequency signal integrity verificationIBM·Filed 2022·Granted May 21, 2024·0 cites·20 claims
- 1859US10566987B2Charge-scaling subtractor circuitIBM·Filed 2019·Granted Feb 18, 2020·0 cites·20 claims
- 1959US2023394347A1Controlled jitter injection into a signalIBM·Filed 2022·Application pending·0 cites
- 2059US2025370424A1Numerically controlled oscillator kernelIBM·Filed 2024·Application pending·0 cites
- 2157US10802062B2Cognitive analysis using applied analog circuitsIBM·Filed 2017·Granted Oct 13, 2020·0 cites·7 claims
- 2257US2025390776A1Training kernels for frequency-multiplexed quantum bit readoutIBM·Filed 2024·Application pending·0 cites
- 2354US2024386302A1Reducing the effects of noise on discernment of quantum states by phase shiftingIBM·Filed 2023·Application pending·0 cites
- 2453US11551101B2Real time cognitive reasoning using a circuit with varying confidence level alertsIBM·Filed 2017·Granted Jan 10, 2023·0 cites·7 claims
- 2553US7400550B2Delay mechanism for unbalanced read/write paths in domino SRAM arraysIBM·Filed 2006·Granted Jul 15, 2008·2 cites·3 claims
- 2652US11526768B2Real time cognitive reasoning using a circuit with varying confidence level alertsIBM·Filed 2017·Granted Dec 13, 2022·0 cites·13 claims
- 2752US2024258795A1Utilizing power infrastructure to provide stable reference frequencyIBM·Filed 2023·Application pending·0 cites
- 2851US10587282B2Charge-scaling adder circuitIBM·Filed 2019·Granted Mar 10, 2020·0 cites·20 claims
- 2950US7206236B1Array redundancy supporting multiple independent repairsIBM·Filed 2006·Granted Apr 17, 2007·2 cites·17 claims
- 3048US10367520B1Charge-scaling subtractor circuitIBM·Filed 2018·Granted Jul 30, 2019·0 cites·20 claims
- 3145US10732931B2Negative operand compatible charge-scaling subtractor circuitIBM·Filed 2018·Granted Aug 4, 2020·0 cites·20 claims
- 3243US2022413864A1Run-length encoding and decoding for a waveformIBM·Filed 2021·Application pending·0 cites
- 3341US2008212396A1Delay Mechanism for Unbalanced Read/Write Paths in Domino SRAM ArraysIBM·Filed 2008·Application pending·0 cites
- 3437US2008117709A1Delay Mechanism for Unbalanced Read/Write Paths in Domino SRAM ArraysIBM·Filed 2007·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when George Paulik files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →