Inventor · disambiguated record
Azeez Bhavnagarwala
Also filed as: BHAVNAGARWALA AZEEZ · BHAVNAGARWALA AZEEZ J · BHAVNAGARWALA AZEEZ JENNUDIN
40 granted patents·10 pending applications·655 citations·filing 2000–2024
98Inventor score
Top patents by PatentIndex Score
50 records- 0199US9589636B1Method, system and device for complementary non-volatile memory device operationADVANCED RISC MACH LTD·Filed 2015·Granted Mar 7, 2017·104 cites·15 claims
- 0298US9773550B2Circuit and method for configurable impedance arrayADVANCED RISC MACH LTD·Filed 2015·Granted Sep 26, 2017·33 cites·17 claims
- 0398US9548118B1Method, system and device for complementary non-volatile memory device operationADVANCED RISC MACH LTD·Filed 2015·Granted Jan 17, 2017·35 cites·20 claims
- 0496US9947402B1Method, system and device for non-volatile memory device operationADVANCED RISC MACH LTD·Filed 2017·Granted Apr 17, 2018·25 cites·15 claims
- 0596US6977519B2Digital logic with reduced leakageIBM·Filed 2003·Granted Dec 20, 2005·78 cites·23 claims
- 0695US9990992B2Method, system and device for non-volatile memory device operationADVANCED RISC MACH LTD·Filed 2016·Granted Jun 5, 2018·17 cites·13 claims
- 0795US9792984B1Method, system and device for non-volatile memory device operationADVANCED RISC MACH LTD·Filed 2016·Granted Oct 17, 2017·18 cites·19 claims
- 0894US9972388B2Method, system and device for power-up operationADVANCED RISC MACH LTD·Filed 2016·Granted May 15, 2018·17 cites·18 claims
- 0987US6683805B2Suppression of leakage currents in VLSI logic and memory circuitsIBM·Filed 2002·Granted Jan 27, 2004·41 cites·30 claims
- 1085US6920061B2Loadless NMOS four transistor dynamic dual Vt SRAM cellIBM·Filed 2003·Granted Jul 19, 2005·36 cites·31 claims
- 1184US6788566B1Self-timed read and write assist and restore circuitIBM·Filed 2003·Granted Sep 7, 2004·35 cites·19 claims
- 1284US6529400B1Source pulsed, dynamic threshold complementary metal oxide semiconductor static RAM cellsLSI LOGIC CORP·Filed 2000·Granted Mar 4, 2003·35 cites·12 claims
- 1381US6975532B1Quasi-static random access memoryIBM·Filed 2004·Granted Dec 13, 2005·29 cites·7 claims
- 1481US6861739B1Minimum metal consumption power distribution network on a bonded dieLSI LOGIC CORP·Filed 2001·Granted Mar 1, 2005·30 cites·24 claims
- 1580US9859003B1Selective writes in a storage elementADVANCED RISC MACH LTD·Filed 2016·Granted Jan 2, 2018·4 cites·13 claims
- 1680US7259986B2Circuits and methods for providing low voltage, high performance register filesIBM·Filed 2005·Granted Aug 21, 2007·12 cites·22 claims
- 1780US6515893B1Source pulsed, low voltage CMOS SRAM cell for fast, stable operationLSI LOGIC CORP·Filed 2001·Granted Feb 4, 2003·30 cites·8 claims
- 1879US6876595B2Decode path gated low active power SRAMIBM·Filed 2003·Granted Apr 5, 2005·25 cites·36 claims
- 1977US2025070780A1Circuits and methods to harvest energy from transient on-chip dataMETIS MICROSYSTEMS LLC·Filed 2024·Application pending·0 cites
- 2077US2025070779A1Circuits and methods to use energy harvested from transient on-chip dataMETIS MICROSYSTEMS LLC·Filed 2024·Application pending·0 cites
- 2175US6839299B1Method and structure for reducing gate leakage and threshold voltage fluctuation in memory cellsIBM·Filed 2003·Granted Jan 4, 2005·21 cites·25 claims
- 2274US2025201302A1Fast, energy efficient cmos 2p1r1w register file array using harvested dataMETIS MICROSYSTEMS LLC·Filed 2024·Application pending·0 cites
- 2372US10049735B2Method, system and device for complementary non-volatile memory device operationADVANCED RISC MACH LTD·Filed 2017·Granted Aug 14, 2018·2 cites·21 claims
- 2472US7968450B2Methods for incorporating high dielectric materials for enhanced SRAM operation and structures produced therebyIBM·Filed 2009·Granted Jun 28, 2011·4 cites·12 claims
- 2571US11984888B2Circuits and methods to harvest energy from transient on-chip dataBHAVNAGARWALA AZEEZ·Filed 2021·Granted May 14, 2024·0 cites·20 claims
- 2671US11984887B2Circuits and methods to use energy harvested from transient on-chip dataBHAVNAGARWALA AZEEZ·Filed 2021·Granted May 14, 2024·0 cites·20 claims
- 2770US2023268923A1Circuits & methods to harvest energy from transient dataMETIS MICROSYSTEMS LLC·Filed 2022·Application pending·0 cites
- 2869US12046278B2Fast, energy efficient CMOS 2P1R1W register file array using harvested dataMETIS MICROSYSTEMS LLC·Filed 2022·Granted Jul 23, 2024·0 cites·20 claims
- 2966US2023267994A1Fast, energy efficient cmos 2p1r1w register file array using harvested dataMETIS MICROSYSTEMS LLC·Filed 2022·Application pending·0 cites
- 3065US12224000B2Fast, energy efficient 6T SRAM arrays using harvested dataMETIS MICROSYSTEMS LLC·Filed 2022·Granted Feb 11, 2025·0 cites·16 claims
- 3163US7397691B2Static random access memory cell with improved stabilityIBM·Filed 2006·Granted Jul 8, 2008·4 cites·17 claims
- 3262US10008263B2Method, system and device for complementary non-volatile memory device operationADVANCED RISC MACH LTD·Filed 2016·Granted Jun 26, 2018·1 cites·20 claims
- 3361US8214169B2Circuits and methods for characterizing random variations in device characteristics in semiconductor integrated circuitsBHAVNAGARWALA AZEEZ·Filed 2003·Granted Jul 3, 2012·11 cites·11 claims
- 3459US2023282272A1Fast, energy efficient 6t sram arrays using harvested dataMETIS MICROSYSTEMS LLC·Filed 2023·Application pending·0 cites
- 3552US10388377B2Method, system and device for complementary non-volatile memory device operationADVANCED RISC MACH LTD·Filed 2018·Granted Aug 20, 2019·0 cites·20 claims
- 3652US10381076B2Circuit and method for configurable impedance arrayADVANCED RISC MACH LTD·Filed 2018·Granted Aug 13, 2019·0 cites·15 claims
- 3750US10276238B2Method, system and device for complementary non-volatile memory device operationADVANCED RISC MACH LTD·Filed 2018·Granted Apr 30, 2019·0 cites·19 claims
- 3849US9905295B2Circuit and method for configurable impedance arrayADVANCED RISC MACH LTD·Filed 2017·Granted Feb 27, 2018·0 cites·20 claims
- 3948US10431304B2Method, system and device for non-volatile memory device operationADVANCED RISC MACH LTD·Filed 2018·Granted Oct 1, 2019·0 cites·19 claims
- 4048US10181350B2Selective writes in a storage elementADVANCED RISC MACH LTD·Filed 2017·Granted Jan 15, 2019·0 cites·14 claims
- 4147US10127981B2Method, system and device for non-volatile memory device operationADVANCED RISC MACH LTD·Filed 2018·Granted Nov 13, 2018·0 cites·18 claims
- 4247US6791886B1SRAM cell with bootstrapped power lineIBM·Filed 2003·Granted Sep 14, 2004·4 cites·29 claims
- 4346US7180818B2High performance register file with bootstrapped storage supply and method of reading data therefromIBM·Filed 2004·Granted Feb 20, 2007·4 cites·39 claims
- 4445US10062435B2Method, system and device for non-volatile memory device operationADVANCED RISC MACH LTD·Filed 2017·Granted Aug 28, 2018·0 cites·16 claims
- 4543US2014257738A1Hierarchically divided signal path for characterizing integrated circuitsGLOBALFOUNDRIES INC·Filed 2013·Application pending·0 cites
- 4642US7545671B2Static random access memory cell with improved stabilityIBM·Filed 2008·Granted Jun 9, 2009·0 cites·17 claims
- 4742US2006103023A1Methods for incorporating high k dielectric materials for enhanced SRAM operation and structures produced therebyIBM·Filed 2004·Application pending·0 cites
- 4841US2013132023A1Structure for characterizing through-silicon vias and methods thereofBHAVNAGARWALA AZEEZ J·Filed 2011·Application pending·0 cites
- 4940US2012179412A1Circuits and Methods for Characterizing Random Variations in Device Characteristics in Semiconductor Integrated CircuitsBHAVNAGARWALA AZEEZ·Filed 2012·Application pending·0 cites
- 5038US8587288B2Digital interface for fast, inline, statistical characterization of process, MOS device and circuit variationsBHAVNAGARWALA AZEEZ JENNUDIN·Filed 2010·Granted Nov 19, 2013·0 cites·5 claims
Join the waitlist — get patent alerts
Get an alert when Azeez Bhavnagarwala files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →