Inventor · disambiguated record
Todd A. Randazzo
Also filed as: RANDAZZO TODD · RANDAZZO TODD A · RANDAZZO TODD ANDREW
49 granted patents·4 pending applications·901 citations·filing 1990–2012
98Inventor score
Top patents by PatentIndex Score
53 records- 0194US6342734B1Interconnect-integrated metal-insulator-metal capacitor and method of fabricating sameLSI LOGIC CORP·Filed 2000·Granted Jan 29, 2002·77 cites·15 claims
- 0291US6614283B1Voltage level shifterLSI LOGIC CORP·Filed 2002·Granted Sep 2, 2003·52 cites·22 claims
- 0387US5493142AInput/output transistors with optimized ESD protectionATMEL CORP·Filed 1995·Granted Feb 20, 1996·77 cites·24 claims
- 0486US5821572ASimple BICMOS process for creation of low trigger voltage SCR and zener diode pad protectionSYMBIOS INC·Filed 1996·Granted Oct 13, 1998·60 cites·17 claims
- 0584US6803801B2CMOS level shifters using native devicesLSI LOGIC CORP·Filed 2002·Granted Oct 12, 2004·32 cites·4 claims
- 0684US6130117ASimple bicmos process for creation of low trigger voltage SCR and zener diode pad protectionLSI LOGIC CORP·Filed 1998·Granted Oct 10, 2000·53 cites·6 claims
- 0782US7868362B2SOI on package hypersensitive sensorHONEYWELL INT INC·Filed 2008·Granted Jan 11, 2011·10 cites·20 claims
- 0880US6514824B1Semiconductor device with a pair of transistors having dual work function gate electrodesLSI LOGIC CORP·Filed 2000·Granted Feb 4, 2003·28 cites·21 claims
- 0979US5858828AUse of MEV implantation to form vertically modulated N+ buried layer in an NPN bipolar transistorSYMBIOS INC·Filed 1997·Granted Jan 12, 1999·48 cites·17 claims
- 1078US6794310B1Method and apparatus for determining temperature of a semiconductor wafer during fabrication thereofLSI LOGIC CORP·Filed 2001·Granted Sep 21, 2004·17 cites·14 claims
- 1178US6316817B1MeV implantation to form vertically modulated N+ buried layer in an NPN bipolar transistorLSI LOGIC CORP·Filed 1998·Granted Nov 13, 2001·46 cites·20 claims
- 1277US8310021B2Neutron detector with wafer-to-wafer bondingLARSEN BRADLEY J·Filed 2010·Granted Nov 13, 2012·3 cites·18 claims
- 1377US6822282B2Analog capacitor in dual damascene processLSI LOGIC CORP·Filed 2003·Granted Nov 23, 2004·22 cites·2 claims
- 1477US5648930ANon-volatile memory which is programmable from a power sourceSYMBIOS LOGIC INC·Filed 1996·Granted Jul 15, 1997·43 cites·6 claims
- 1576US8912818B2High speed multiple memory interface I/O cellLSI CORP·Filed 2012·Granted Dec 16, 2014·4 cites·20 claims
- 1675US6545305B1Linear capacitor and process for making sameLSI LOGIC CORP·Filed 2000·Granted Apr 8, 2003·17 cites·20 claims
- 1774US8324927B2High speed multiple memory interface I/O cellBHAKTA DHARMESH·Filed 2010·Granted Dec 4, 2012·5 cites·20 claims
- 1874US6855586B2Low voltage breakdown element for ESD trigger deviceLSI LOGIC CORP·Filed 2003·Granted Feb 15, 2005·16 cites·11 claims
- 1972US6063672ANMOS electrostatic discharge protection device and method for CMOS integrated circuitLSI LOGIC CORP·Filed 1999·Granted May 16, 2000·31 cites·11 claims
- 2072US5440159ASingle layer polysilicon EEPROM having uniform thickness gate oxide/capacitor dielectric layerATMEL CORP·Filed 1994·Granted Aug 8, 1995·34 cites·12 claims
- 2171US6710990B2Low voltage breakdown element for ESD trigger deviceLSI LOGIC CORP·Filed 2002·Granted Mar 23, 2004·14 cites·19 claims
- 2270US6924689B2Level shifter reference generatorLSI LOGIC CORP·Filed 2002·Granted Aug 2, 2005·16 cites·20 claims
- 2369US6825546B1CMOS varactor with constant dC/dV characteristicLSI LOGIC CORP·Filed 2001·Granted Nov 30, 2004·14 cites·5 claims
- 2466US6501318B1High speed input buffer circuitLSI LOGIC CORP·Filed 2001·Granted Dec 31, 2002·11 cites·12 claims
- 2564US6090656ALinear capacitor and process for making sameLSI LOGIC·Filed 1998·Granted Jul 18, 2000·20 cites·14 claims
- 2663US6596579B1Method of forming analog capacitor dual damascene processLSI LOGIC CORP·Filed 2001·Granted Jul 22, 2003·10 cites·16 claims
- 2762US8399845B2Neutron detector cell efficiencyFECHNER PAUL S·Filed 2012·Granted Mar 19, 2013·2 cites·19 claims
- 2860US6211555B1Semiconductor device with a pair of transistors having dual work function gate electrodesLSI LOGIC CORP·Filed 1998·Granted Apr 3, 2001·18 cites·24 claims
- 2957US5340764AIntegration of high performance submicron CMOS and dual-poly non-volatile memory devices using a third polysilicon layerATMEL CORP·Filed 1993·Granted Aug 23, 1994·16 cites·15 claims
- 3056US6328802B1Method and apparatus for determining temperature of a semiconductor wafer during fabrication thereofLSI LOGIC CORP·Filed 1999·Granted Dec 11, 2001·17 cites·7 claims
- 3155US7876123B2High speed multiple memory interface I/O cellLSI CORP·Filed 2008·Granted Jan 25, 2011·2 cites·22 claims
- 3253US8153985B2Neutron detector cell efficiencyRANDAZZO TODD ANDREW·Filed 2009·Granted Apr 10, 2012·2 cites·16 claims
- 3352US6931560B1Programmable transmit SCSI equalizationLSI LOGIC CORP·Filed 2001·Granted Aug 16, 2005·6 cites·21 claims
- 3452US6133077AFormation of high-voltage and low-voltage devices on a semiconductor substrateLSI LOGIC CORP·Filed 1998·Granted Oct 17, 2000·11 cites·23 claims
- 3552US5661687ADrain excluded EPROM cellSYMBIOS LOGIC INC·Filed 1996·Granted Aug 26, 1997·13 cites·17 claims
- 3650US7948275B2Transceiver with fault tolerant driverLSI CORP·Filed 2008·Granted May 24, 2011·0 cites·20 claims
- 3750US7176082B2Analog capacitor in dual damascene processLSI LOGIC CORP·Filed 2004·Granted Feb 13, 2007·4 cites·4 claims
- 3849US7180360B2Method and apparatus for summing DC voltagesLSI LOGIC CORP·Filed 2004·Granted Feb 20, 2007·0 cites·19 claims
- 3949US6621299B1Control circuit for powerLSI LOGIC CORP·Filed 2001·Granted Sep 16, 2003·5 cites·17 claims
- 4047US2010006912A1Planar Metal-Insulator-Metal Circuit Element and Method for Planar Integration of SameHONEYWELL INT INC·Filed 2009·Application pending·0 cites
- 4146US6587322B2Swapped drain structures for electrostatic discharge protectionLSI LOGIC CORP·Filed 2001·Granted Jul 1, 2003·2 cites·23 claims
- 4245US5838616AGate edge aligned EEPROM transistorSYMBIOS INC·Filed 1996·Granted Nov 17, 1998·9 cites·23 claims
- 4344US7457090B2Use of a known common-mode voltage for input overvoltage protection in pseudo-differential receiversLSI CORP·Filed 2004·Granted Nov 25, 2008·3 cites·17 claims
- 4444US2010200918A1Heavy Ion Upset Hardened Floating Body SRAM CellsHONEYWELL INT INC·Filed 2009·Application pending·0 cites
- 4543US6194766B1Integrated circuit having low voltage and high voltage devices on a common semiconductor substrateLSI LOGIC CORP·Filed 2000·Granted Feb 27, 2001·1 cites·11 claims
- 4640US6359314B1Swapped drain structures for electrostatic discharge protectionLSI LOGIC CORP·Filed 1999·Granted Mar 19, 2002·5 cites·13 claims
- 4740US5780329AProcess for fabricating a moderate-depth diffused emitter bipolar transistor in a BICMOS device without using an additional maskSYMBIOS INC·Filed 1997·Granted Jul 14, 1998·8 cites·15 claims
- 4838US6093585AHigh voltage tolerant thin film transistorLSI LOGIC CORP·Filed 1998·Granted Jul 25, 2000·5 cites·38 claims
- 4937US8315588B2Resistive voltage-down regulator for integrated circuit receiversRANDAZZO TODD A·Filed 2004·Granted Nov 20, 2012·2 cites·17 claims
- 5037US2011186940A1Neutron sensor with thin interconnect stackHONEYWELL INT INC·Filed 2010·Application pending·0 cites
Showing the top 50 of 53 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →