Inventor · disambiguated record
Scott Barnett Swaney
Also filed as: SWANEY SCOTT · SWANEY SCOTT B · SWANEY SCOTT BARNETT
42 granted patents·1 pending application·486 citations·filing 1995–2019
98Inventor score
Top patents by PatentIndex Score
43 records- 0194US7870438B2Method, system and computer program product for sampling computer system performance dataIBM·Filed 2008·Granted Jan 11, 2011·38 cites·19 claims
- 0292US7467325B2Processor instruction retry recoveryIBM·Filed 2005·Granted Dec 16, 2008·26 cites·12 claims
- 0391US7084660B1System and method for accelerated detection of transient particle induced soft error rates in integrated circuitsIBM·Filed 2005·Granted Aug 1, 2006·32 cites·20 claims
- 0487US7512826B2Method, apparatus, and product for an efficient virtualized time base in a scaleable multi-processor computerIBM·Filed 2005·Granted Mar 31, 2009·19 cites·13 claims
- 0587US6968709B2System and method for cooling multiple logic modulesIBM·Filed 2003·Granted Nov 29, 2005·46 cites·10 claims
- 0685US7467204B2Method for providing low-level hardware access to in-band and out-of-band firmwareIBM·Filed 2005·Granted Dec 16, 2008·14 cites·1 claims
- 0784US8244972B2Optimizing EDRAM refresh rates in a high performance cache architectureBRONSON TIMOTHY C·Filed 2010·Granted Aug 14, 2012·7 cites·17 claims
- 0884US7827443B2Processor instruction retry recoveryIBM·Filed 2008·Granted Nov 2, 2010·12 cites·19 claims
- 0983US7966536B2Method and apparatus for automatic scan completion in the event of a system checkstopIBM·Filed 2008·Granted Jun 21, 2011·14 cites·20 claims
- 1083US7840860B2Double DRAM bit steering for multiple error correctionsIBM·Filed 2008·Granted Nov 23, 2010·10 cites·19 claims
- 1183US5692121ARecovery unit for mirrored processorsIBM·Filed 1996·Granted Nov 25, 1997·128 cites·17 claims
- 1281US10579499B2Task latency debugging in symmetric multiprocessing computer systemsIBM·Filed 2017·Granted Mar 3, 2020·3 cites·17 claims
- 1381US7523364B2Double DRAM bit steering for multiple error correctionsIBM·Filed 2005·Granted Apr 21, 2009·12 cites·1 claims
- 1478US7487377B2Method and apparatus for fault tolerant time synchronization mechanism in a scaleable multi-processor computerIBM·Filed 2005·Granted Feb 3, 2009·7 cites·8 claims
- 1577US7865758B2Fault tolerant time synchronization mechanism in a scaleable multi-processor computerIBM·Filed 2008·Granted Jan 4, 2011·6 cites·8 claims
- 1674US7568138B2Method to prevent firmware defects from disturbing logic clocks to improve system reliabilityIBM·Filed 2006·Granted Jul 28, 2009·8 cites·6 claims
- 1774US6671793B1Method and system for managing the result from a translator co-processor in a pipelined processorIBM·Filed 2000·Granted Dec 30, 2003·23 cites·11 claims
- 1872US7418541B2Method for indirect access to a support interface for memory-mapped resources to reduce system connectivity from out-of-band support processorIBM·Filed 2005·Granted Aug 26, 2008·5 cites·1 claims
- 1970US8135960B2Multiprocessor electronic circuit including a plurality of processors and electronic data processing systemKOEHLER THOMAS·Filed 2008·Granted Mar 13, 2012·4 cites·8 claims
- 2069US8560767B2Optimizing EDRAM refresh rates in a high performance cache architectureBRONSON TIMOTHY C·Filed 2012·Granted Oct 15, 2013·2 cites·8 claims
- 2169US7870406B2Method and apparatus for frequency independent processor utilization recording register in a simultaneously multi-threaded processorIBM·Filed 2005·Granted Jan 11, 2011·4 cites·21 claims
- 2269US7624318B2Method and apparatus for automatically identifying multiple combinations of operational and non-operational components on integrated circuit chips with a single part numberIBM·Filed 2005·Granted Nov 24, 2009·6 cites·20 claims
- 2368US7200742B2System and method for creating precise exceptionsIBM·Filed 2005·Granted Apr 3, 2007·4 cites·16 claims
- 2467US8499144B2Updating settings of a processor core concurrently to the operation of a multi core processor systemCONKLIN CHRISTOPHER R·Filed 2010·Granted Jul 30, 2013·4 cites·19 claims
- 2567US7478276B2Method for checkpointing instruction groups with out-of-order floating point instructions in a multi-threaded processorIBM·Filed 2005·Granted Jan 13, 2009·4 cites·9 claims
- 2665US7707452B2Recovering from errors in a data processing systemIBM·Filed 2008·Granted Apr 27, 2010·2 cites·16 claims
- 2760US7761726B2Method and apparatus for fault tolerant time synchronization mechanism in a scaleable multi-processor computerIBM·Filed 2008·Granted Jul 20, 2010·1 cites·7 claims
- 2856US9342395B2Error checking using serial collection of error dataIBM·Filed 2014·Granted May 17, 2016·0 cites·18 claims
- 2955US9348686B2Error checking using serial collection of error dataIBM·Filed 2014·Granted May 24, 2016·0 cites·7 claims
- 3055US6952763B1Write before read interlock for recovery unit operandsIBM·Filed 2000·Granted Oct 4, 2005·5 cites·18 claims
- 3155US6311311B1Multiple input shift register (MISR) signatures used on architected registers to detect interim functional errors on instruction stream testIBM·Filed 1999·Granted Oct 30, 2001·31 cites·3 claims
- 3253US7916722B2Method for indirect access to a support interface for memory-mapped resources to reduce system connectivity from out-of-band support processorIBM·Filed 2008·Granted Mar 29, 2011·0 cites·20 claims
- 3352US8090823B2Providing low-level hardware access to in-band and out-of-band firmwareFIELDS JR JAMES STEPHEN·Filed 2008·Granted Jan 3, 2012·0 cites·19 claims
- 3449US8122297B2Method and apparatus for parallel and serial data transferMEANEY PATRICK J·Filed 2007·Granted Feb 21, 2012·0 cites·20 claims
- 3549US7409580B2System and method for recovering from errors in a data processing systemIBM·Filed 2005·Granted Aug 5, 2008·0 cites·5 claims
- 3648US11226839B2Maintaining compatibility for complex functions over multiple machine generationsIBM·Filed 2019·Granted Jan 18, 2022·0 cites·18 claims
- 3747US9164761B2Obtaining data in a pipelined processorTSAI AARON·Filed 2008·Granted Oct 20, 2015·0 cites·14 claims
- 3844US7343534B2Method for deferred data collection in a clock running systemIBM·Filed 2004·Granted Mar 11, 2008·1 cites·15 claims
- 3943US7777520B2System, method and apparatus for enhancing reliability on scan-initialized latches affecting functionalityIBM·Filed 2008·Granted Aug 17, 2010·0 cites·20 claims
- 4043US2006184771A1Mini-refresh processor recovery as bug workaround method using existing recovery hardwareIBM·Filed 2005·Application pending·0 cites
- 4142US8127118B2Microarchitecture, method and computer program product for efficient data gathering from a set of trace arraysWEST JR PATRICK M·Filed 2008·Granted Feb 28, 2012·0 cites·21 claims
- 4236US5673391AHardware retry trap for millicoded processorIBM·Filed 1995·Granted Sep 30, 1997·8 cites·12 claims
- 4333US8090929B2Generating clock signals for coupled ASIC chips in processor interface with X and Y logic operable in functional and scanning modesMAGEE JEFFREY A·Filed 2008·Granted Jan 3, 2012·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →