Inventor · disambiguated record
Colman Cheung
Also filed as: CHEUNG COLMAN · CHEUNG COLMAN C · CHEUNG COLMAN CHUNGLING
15 granted patents·3 pending applications·543 citations·filing 1999–2024
92Inventor score
Top patents by PatentIndex Score
18 records- 0197US8533245B1Multipliers with a reduced number of memory blocksCHEUNG COLMAN C·Filed 2010·Granted Sep 10, 2013·408 cites·21 claims
- 0293US8959136B1Matrix operations in an integrated circuit deviceCHEUNG COLMAN C·Filed 2012·Granted Feb 17, 2015·29 cites·18 claims
- 0393US8942248B1Shared control logic for multiple queuesCHEUNG COLMAN C·Filed 2010·Granted Jan 27, 2015·24 cites·20 claims
- 0490US9837988B1Dynamically adjustable decimation filter circuitryALTERA CORP·Filed 2015·Granted Dec 5, 2017·8 cites·23 claims
- 0573US2024396579A1Systems And Methods For Electronically Scanned Array AntennasALTERA CORP·Filed 2024·Application pending·0 cites
- 0671US9331703B1Sample rate converterALTERA CORP·Filed 2014·Granted May 3, 2016·3 cites·19 claims
- 0771US8648738B1Apparatus and methods of rate control for a sample rate converterYE ZHUAN·Filed 2012·Granted Feb 11, 2014·3 cites·16 claims
- 0866US6781956B1System and method for prioritizing packetized data from a distributed control environment for transmission through a high bandwidth linkCISCO TECH IND·Filed 1999·Granted Aug 24, 2004·52 cites·49 claims
- 0964US7489636B1System and method for prioritizing packetized data from distributed control environment for transmission through a high bandwidth linkCISCO TECH INC·Filed 2004·Granted Feb 10, 2009·8 cites·58 claims
- 1062US7743272B1Methods and apparatus for generating precise timing information using progressive block averagingALTERA CORP·Filed 2007·Granted Jun 22, 2010·2 cites·36 claims
- 1155US12081247B2Systems and methods for electronically scanned array antennasINTEL CORP·Filed 2019·Granted Sep 3, 2024·0 cites·20 claims
- 1255US7298299B1Efficient data recovery algorithm for serial dataALTERA CORP·Filed 2004·Granted Nov 20, 2007·6 cites·23 claims
- 1353US11902132B2Analog-to-digital converter or digital-to-analog converter data path with deterministic latencyINTEL CORP·Filed 2020·Granted Feb 13, 2024·0 cites·20 claims
- 1447US11258431B2Method and apparatus for implementing a super sample rate oversampling channelizerINTEL CORP·Filed 2018·Granted Feb 22, 2022·0 cites·20 claims
- 1545US9112519B1Apparatus and methods of rate control for a sample rate converterALTERA CORP·Filed 2013·Granted Aug 18, 2015·0 cites·20 claims
- 1639US2020328789A1Constraints-Based Phased Array CalibrationINTEL CORP·Filed 2020·Application pending·0 cites
- 1736US2020218775A1Methods and circuitry for boosting the throughput of recursive systemsINTEL CORP·Filed 2020·Application pending·0 cites
- 1834US9484901B1Interpolation circuitry and methodsALTERA CORP·Filed 2015·Granted Nov 1, 2016·0 cites·23 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →