Inventor · disambiguated record
Hubert Maier
Also filed as: MAIER HUBERT
9 granted patents·1 pending application·25 citations·filing 2001–2015
82Inventor score
Top patents by PatentIndex Score
10 records- 0179US9219011B2Separation of chips on a substrateINFINEON TECHNOLOGIES AG·Filed 2013·Granted Dec 22, 2015·3 cites·12 claims
- 0268US6605841B2Method for producing an electrode by means of a field effect controllable semiconductor component and field-effect-controllable semiconductor componentINFINEON TECHNOLOGIES AG·Filed 2001·Granted Aug 12, 2003·16 cites·10 claims
- 0361US9728480B2Passivation layer and method of making a passivation layerINFINEON TECHNOLOGIES AG·Filed 2015·Granted Aug 8, 2017·1 cites·18 claims
- 0457US7718505B2Method of forming a semiconductor structure comprising insulating layers with different thicknessesINFINEON TECHNOLOGIES AUSTRIA·Filed 2007·Granted May 18, 2010·2 cites·38 claims
- 0557US7531439B2Method for forming an integrated semiconductor circuit arrangementINFINEON TECHNOLOGIES AG·Filed 2005·Granted May 12, 2009·2 cites·21 claims
- 0653US9490103B2Separation of chips on a substrateINFINEON TECHNOLOGIES AG·Filed 2015·Granted Nov 8, 2016·0 cites·9 claims
- 0749US9059182B2Method for producing bonding connection of semiconductor deviceMAIER HUBERT·Filed 2006·Granted Jun 16, 2015·1 cites·11 claims
- 0845US2014117511A1Passivation Layer and Method of Making a Passivation LayerINFINEON TECHNOLOGIES AG·Filed 2012·Application pending·0 cites
- 0943US9490173B2Method for processing waferINFINEON TECHNOLOGIES AG·Filed 2013·Granted Nov 8, 2016·0 cites·17 claims
- 1041US7834427B2Integrated circuit having a semiconductor arrangementINFINEON TECHNOLOGIES AUSTRIA·Filed 2007·Granted Nov 16, 2010·0 cites·12 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →