Inventor · disambiguated record
Ronan Casey
Also filed as: CASEY RONAN · CASEY RONAN SEAN
11 granted patents·97 citations·filing 2009–2023
89Inventor score
Top patents by PatentIndex Score
11 records- 0196US11398934B1Ultra-high-speed PAM-N CMOS inverter serial linkXILINX INC·Filed 2021·Granted Jul 26, 2022·15 cites·20 claims
- 0295US11133963B1Dsp cancellation of track-and-hold induced ISI in ADC-based serial linksXILINX INC·Filed 2020·Granted Sep 28, 2021·11 cites·20 claims
- 0395US9876489B1Method of implementing a differential integrating phase interpolatorXILINX INC·Filed 2016·Granted Jan 23, 2018·27 cites·17 claims
- 0493US11489705B1Integrated circuit including a continuous time linear equalizer (CTLE) circuit and method of operationXILINX INC·Filed 2020·Granted Nov 1, 2022·5 cites·17 claims
- 0593US10848171B1Hybrid multiplying capacitive digital-to-analog converter (MC-DAC) based loop regulationXILINX INC·Filed 2020·Granted Nov 24, 2020·11 cites·20 claims
- 0689US9209809B1Circuits for and methods of controlling output swing in a current-mode logic circuitXILINX INC·Filed 2014·Granted Dec 8, 2015·10 cites·20 claims
- 0787US11923857B1DTC nonlinearity correctionXILINX INC·Filed 2023·Granted Mar 5, 2024·2 cites·20 claims
- 0887US10911060B1Low power device for high-speed time-interleaved samplingXILINX INC·Filed 2019·Granted Feb 2, 2021·7 cites·20 claims
- 0984US10291192B1Programmable buffering, bandwidth extension and pre-emphasis of a track-and-hold circuit using series inductanceXILINX INC·Filed 2018·Granted May 14, 2019·8 cites·20 claims
- 1069US11894959B2Ultra-high-speed PAM-N CMOS inverter serial linkXILINX INC·Filed 2022·Granted Feb 6, 2024·0 cites·21 claims
- 1147US8238865B2Image calibration and correction for low-IF receiversCHANCA MIGUEL·Filed 2009·Granted Aug 7, 2012·1 cites·24 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →