Inventor · disambiguated record
Srinivas Rajendra
Also filed as: RAJENDRA SRINIVAS
10 granted patents·1 pending application·51 citations·filing 2015–2022
86Inventor score
Top patents by PatentIndex Score
11 records- 0196US11482262B1Per pin Vref for data receivers in non-volatile memory systemSANDISK TECHNOLOGIES LLC·Filed 2021·Granted Oct 25, 2022·17 cites·20 claims
- 0293US9673798B1Digital pulse width detection based duty cycle correctionSANDISK TECHNOLOGIES LLC·Filed 2016·Granted Jun 6, 2017·17 cites·20 claims
- 0392US11829281B2Semi receiver side write training for non-volatile memory systemSANDISK TECHNOLOGIES LLC·Filed 2021·Granted Nov 28, 2023·3 cites·20 claims
- 0490US11869619B2Systems and methods of reducing detection error and duty error in memory devicesSANDISK TECHNOLOGIES LLC·Filed 2022·Granted Jan 9, 2024·2 cites·15 claims
- 0584US10587247B2Duty cycle and vox correction for complementary signalsSANDISK TECHNOLOGIES LLC·Filed 2018·Granted Mar 10, 2020·6 cites·21 claims
- 0679US11303276B2Active low-power terminationWESTERN DIGITAL TECH INC·Filed 2021·Granted Apr 12, 2022·1 cites·20 claims
- 0779US10284182B2Duty cycle correction scheme for complementary signalsSANDISK TECHNOLOGIES LLC·Filed 2017·Granted May 7, 2019·4 cites·21 claims
- 0853US9385721B1Bulk driven low swing driverSANDISK TECHNOLOGIES INC·Filed 2015·Granted Jul 5, 2016·1 cites·20 claims
- 0952US11456022B2Distributed grouped terminations for multiple memory integrated circuit systemsWESTERN DIGITAL TECH INC·Filed 2020·Granted Sep 27, 2022·0 cites·20 claims
- 1051US12100458B2Systems and methods of correcting errors in unmatched memory devicesSANDISK TECHNOLOGIES LLC·Filed 2022·Granted Sep 24, 2024·0 cites·20 claims
- 1137US2020076412A1Duty cycle correction for complementary clock signalsSANDISK TECHNOLOGIES LLC·Filed 2018·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →