Inventor · disambiguated record
Per Hammarlund
Also filed as: HAMMARLUND PER · HAMMARLUND PER H · HAMMARLUND PER HAKAN
108 granted patents·26 pending applications·1,150 citations·filing 1998–2025
99Inventor score
Top patents by PatentIndex Score
134 records- 0197US7882339B2Primitives to enhance thread-level speculationINTEL CORP·Filed 2005·Granted Feb 1, 2011·56 cites·11 claims
- 0296US11544193B2Scalable cache coherency protocolAPPLE INC·Filed 2021·Granted Jan 3, 2023·8 cites·20 claims
- 0396US7328293B2Queued locks using monitor-memory waitINTEL CORP·Filed 2007·Granted Feb 5, 2008·47 cites·21 claims
- 0493US11675722B2Multiple independent on-chip interconnectAPPLE INC·Filed 2021·Granted Jun 13, 2023·5 cites·22 claims
- 0593US6981129B1Breaking replay dependency loops in a processor using a rescheduled replay queueINTEL CORP·Filed 2000·Granted Dec 27, 2005·87 cites·23 claims
- 0692US6912648B2Stick and spoke replay with selectable delaysINTEL CORP·Filed 2001·Granted Jun 28, 2005·78 cites·14 claims
- 0791US8464035B2Instruction for enabling a processor wait stateDIXON MARTIN G·Filed 2009·Granted Jun 11, 2013·23 cites·24 claims
- 0890US8719806B2Speculative multi-threading for instruction prefetch and/or trace pre-buildWANG HONG·Filed 2010·Granted May 6, 2014·12 cites·14 claims
- 0990US6877086B1Method and apparatus for rescheduling multiple micro-operations in a processor using a replay queue and a counterINTEL CORP·Filed 2000·Granted Apr 5, 2005·66 cites·19 claims
- 1089US11803471B2Scalable system on a chipAPPLE INC·Filed 2022·Granted Oct 31, 2023·1 cites·22 claims
- 1189US7587584B2Mechanism to exploit synchronization overhead to improve multithreaded performanceINTEL CORP·Filed 2005·Granted Sep 8, 2009·31 cites·25 claims
- 1288US9990206B2Mechanism for instruction set based thread execution of a plurality of instruction sequencersINTEL CORP·Filed 2013·Granted Jun 5, 2018·8 cites·18 claims
- 1388US8386823B2Method and apparatus for cost and power efficient, scalable operating system independent servicesINTEL CORP·Filed 2012·Granted Feb 26, 2013·7 cites·20 claims
- 1486US7849465B2Programmable event driven yield mechanism which may activate service threadsINTEL CORP·Filed 2005·Granted Dec 7, 2010·18 cites·24 claims
- 1586US7523465B2Methods and apparatus for generating speculative helper thread spawn-target pointsINTEL CORP·Filed 2003·Granted Apr 21, 2009·35 cites·31 claims
- 1686US6798364B2Method and apparatus for variable length codingINTEL CORP·Filed 2002·Granted Sep 28, 2004·37 cites·30 claims
- 1785US8762694B1Programmable event-driven yield mechanismZOU XIANG·Filed 2006·Granted Jun 24, 2014·24 cites·26 claims
- 1885US7743233B2Sequencer address managementINTEL CORP·Filed 2005·Granted Jun 22, 2010·15 cites·21 claims
- 1984US7757045B2Synchronizing recency information in an inclusive cache hierarchyINTEL CORP·Filed 2006·Granted Jul 13, 2010·14 cites·23 claims
- 2084US7640384B2Queued locks using monitor-memory waitINTEL CORP·Filed 2007·Granted Dec 29, 2009·10 cites·21 claims
- 2183US11550716B2I/O agentAPPLE INC·Filed 2022·Granted Jan 10, 2023·1 cites·17 claims
- 2283US2025278366A1Scalable Cache Coherency ProtocolAPPLE INC·Filed 2025·Application pending·0 cites
- 2382US12399830B2Scalable system on a chipAPPLE INC·Filed 2024·Granted Aug 26, 2025·0 cites·20 claims
- 2482US12332792B2Scalable cache coherency protocolAPPLE INC·Filed 2024·Granted Jun 17, 2025·0 cites·20 claims
- 2582US7502912B2Method and apparatus for rescheduling operations in a processorINTEL CORP·Filed 2003·Granted Mar 10, 2009·33 cites·24 claims
- 2682US6675282B2System and method for employing a global bit for page sharing in a linear-addressed cacheINTEL CORP·Filed 2003·Granted Jan 6, 2004·29 cites·36 claims
- 2782US6643747B2Processing requests to efficiently access a limited bandwidth storage areaINTEL CORP·Filed 2000·Granted Nov 4, 2003·34 cites·25 claims
- 2881US2024370371A1Scalable System on a ChipAPPLE INC·Filed 2024·Application pending·0 cites
- 2980US8171321B2Method and apparatus for cost and power efficient, scalable operating system independent servicesKUMAR ARVIND·Filed 2007·Granted May 1, 2012·9 cites·29 claims
- 3080US7213093B2Queued locks using monitor-memory waitINTEL CORP·Filed 2003·Granted May 1, 2007·22 cites·14 claims
- 3180US6952764B2Stopping replay tornadoesINTEL CORP·Filed 2001·Granted Oct 4, 2005·29 cites·17 claims
- 3280US2025015701A1Merged Power DeliveryAPPLE INC·Filed 2024·Application pending·0 cites
- 3379US11467988B1Memory fetch granuleAPPLE INC·Filed 2021·Granted Oct 11, 2022·1 cites·20 claims
- 3479US9164764B2Single instruction for specifying and saving a subset of registers, specifying a pointer to a work-monitoring function to be executed after waking, and entering a low-power modeINTEL CORP·Filed 2014·Granted Oct 20, 2015·3 cites·20 claims
- 3579US8078831B2Method and apparatus for affinity-guided speculative helper threads in chip multiprocessorsWANG HONG·Filed 2010·Granted Dec 13, 2011·5 cites·8 claims
- 3679US7487502B2Programmable event driven yield mechanism which may activate other threadsINTEL CORP·Filed 2003·Granted Feb 3, 2009·19 cites·37 claims
- 3779US7404067B2Method and apparatus for efficient utilization for prescient instruction prefetchINTEL CORP·Filed 2003·Granted Jul 22, 2008·25 cites·4 claims
- 3879US6105111AMethod and apparatus for providing a cache management techniqueINTEL CORP·Filed 1998·Granted Aug 15, 2000·84 cites·20 claims
- 3978US8990597B2Instruction for enabling a processor wait stateINTEL CORP·Filed 2013·Granted Mar 24, 2015·3 cites·20 claims
- 4078US8762692B2Single instruction for specifying and saving a subset of registers, specifying a pointer to a work-monitoring function to be executed after waking, and entering a low-power modeSCHUCHMAN ETHAN·Filed 2007·Granted Jun 24, 2014·9 cites·31 claims
- 4178US7818547B2Method and apparatus for efficient resource utilization for prescient instruction prefetchINTEL CORP·Filed 2008·Granted Oct 19, 2010·7 cites·18 claims
- 4278US7657880B2Safe store for speculative helper threadsINTEL CORP·Filed 2003·Granted Feb 2, 2010·26 cites·30 claims
- 4378US7500049B2Providing a backing store in user-level memoryINTEL CORP·Filed 2005·Granted Mar 3, 2009·8 cites·26 claims
- 4477US11868258B2Scalable cache coherency protocolAPPLE INC·Filed 2023·Granted Jan 9, 2024·0 cites·20 claims
- 4577US7603527B2Resolving false dependencies of speculative load instructionsINTEL CORP·Filed 2006·Granted Oct 13, 2009·8 cites·30 claims
- 4676US11947457B2Scalable cache coherency protocolAPPLE INC·Filed 2022·Granted Apr 2, 2024·0 cites·19 claims
- 4776US11934313B2Scalable system on a chipAPPLE INC·Filed 2022·Granted Mar 19, 2024·0 cites·21 claims
- 4876US10459858B2Programmable event driven yield mechanism which may activate other threadsINTEL CORP·Filed 2017·Granted Oct 29, 2019·1 cites·14 claims
- 4975US12007895B2Scalable system on a chipAPPLE INC·Filed 2022·Granted Jun 11, 2024·0 cites·25 claims
- 5075US10877910B2Programmable event driven yield mechanism which may activate other threadsINTEL CORP·Filed 2017·Granted Dec 29, 2020·1 cites·10 claims
Showing the top 50 of 134 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →