Inventor · disambiguated record
Mehul R. Vashi
Also filed as: VASHI MEHUL · VASHI MEHUL R
18 granted patents·600 citations·filing 1998–2021
96Inventor score
Files withXILINX INC18
Top patents by PatentIndex Score
18 records- 0193US6522167B1User configurable on-chip memory systemXILINX INC·Filed 2001·Granted Feb 18, 2003·93 cites·25 claims
- 0292US7269805B1Testing of an integrated circuit having an embedded processorXILINX INC·Filed 2004·Granted Sep 11, 2007·70 cites·9 claims
- 0391US6976160B1Method and system for controlling default values of flip-flops in PGA/ASIC-based designsXILINX INC·Filed 2002·Granted Dec 13, 2005·43 cites·17 claims
- 0489US6798239B2Programmable gate array having interconnecting logic to support embedded fixed logic circuitryXILINX INC·Filed 2001·Granted Sep 28, 2004·62 cites·17 claims
- 0589US6662285B1User configurable memory system having local and global memory blocksXILINX INC·Filed 2001·Granted Dec 9, 2003·73 cites·33 claims
- 0688US7420392B2Programmable gate array and embedded circuitry initialization and processingXILINX INC·Filed 2004·Granted Sep 2, 2008·35 cites·45 claims
- 0786US7406670B1Testing of an integrated circuit having an embedded processorXILINX INC·Filed 2007·Granted Jul 29, 2008·14 cites·11 claims
- 0885US6070260ATest methodology based on multiple skewed scan clocksXILINX INC·Filed 1998·Granted May 30, 2000·60 cites·20 claims
- 0984US7624209B1Method of and circuit for enabling variable latency data transfersXILINX INC·Filed 2004·Granted Nov 24, 2009·41 cites·33 claims
- 1081US6625788B1Method for verifying timing in a hard-wired IC device modeled from an FPGAXILINX INC·Filed 2000·Granted Sep 23, 2003·28 cites·8 claims
- 1174US7418679B1Method of enabling timing verification of a circuit designXILINX INC·Filed 2005·Granted Aug 26, 2008·7 cites·20 claims
- 1274US7139673B1Method of and circuit for verifying a data transfer protocolXILINX INC·Filed 2004·Granted Nov 21, 2006·17 cites·13 claims
- 1374US7007121B1Method and apparatus for synchronized busesXILINX INC·Filed 2002·Granted Feb 28, 2006·19 cites·26 claims
- 1463US7333909B1Method of and circuit for verifying a data transfer protocolXILINX INC·Filed 2006·Granted Feb 19, 2008·2 cites·18 claims
- 1563US7117471B1Generation of design views having consistent input/output pin definitionsXILINX INC·Filed 2004·Granted Oct 3, 2006·12 cites·14 claims
- 1656US7401258B1Circuit for and method of accessing instruction data written to a memoryXILINX INC·Filed 2004·Granted Jul 15, 2008·5 cites·27 claims
- 1753US12148464B2Current leakage management controller for reading from memory cellsXILINX INC·Filed 2021·Granted Nov 19, 2024·0 cites·19 claims
- 1849US6219819B1Method for verifying timing in a hard-wired IC device modeled from an FPGAXILINX INC·Filed 1998·Granted Apr 17, 2001·19 cites·5 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →