Inventor · disambiguated record
Robert D. Odineal
Also filed as: ODINEAL ROBERT D
6 granted patents·1 pending application·262 citations·filing 1994–2010
85Inventor score
Top patents by PatentIndex Score
7 records- 0188US5530933AMultiprocessor system for maintaining cache coherency by checking the coherency in the order of the transactions being issued on the busHEWLETT PACKARD CO·Filed 1994·Granted Jun 25, 1996·139 cites·4 claims
- 0275US6304932B1Queue-based predictive flow control mechanism with indirect determination of queue fullnessHEWLETT PACKARD CO·Filed 2000·Granted Oct 16, 2001·19 cites·3 claims
- 0371US5737757ACache tag system for use with multiple processors including the most recently requested processor identificationHEWLETT PACKARD CO·Filed 1997·Granted Apr 7, 1998·63 cites·4 claims
- 0453US6182176B1Queue-based predictive flow control mechanismHEWLETT PACKARD CO·Filed 1994·Granted Jan 30, 2001·22 cites·1 claims
- 0547US5519838AFast pipelined distributed arbitration schemeHEWLETT PACKARD CO·Filed 1994·Granted May 21, 1996·19 cites·6 claims
- 0636US9535872B2Physical chassis as a different number of logical chassisPAULSON DAVE W·Filed 2009·Granted Jan 3, 2017·0 cites·17 claims
- 0733US2012106052A1Twin-mate cpu assemblyODINEAL ROBERT D·Filed 2010·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →