Inventor · disambiguated record
Jared W. Stark, Iv
Also filed as: STARK IV JARED W · STARK IV JARED WARNER · STARK JARED · STARK JARED W
29 granted patents·12 pending applications·97 citations·filing 2001–2024
95Inventor score
Top patents by PatentIndex Score
41 records- 0192US12236243B2Apparatuses and methods for speculative execution side channel mitigationINTEL CORP·Filed 2023·Granted Feb 25, 2025·2 cites·28 claims
- 0290US10579535B2Defragmented and efficient micro-operation cacheINTEL CORP·Filed 2017·Granted Mar 3, 2020·15 cites·20 claims
- 0390US8719806B2Speculative multi-threading for instruction prefetch and/or trace pre-buildWANG HONG·Filed 2010·Granted May 6, 2014·12 cites·14 claims
- 0488US11635965B2Apparatuses and methods for speculative execution side channel mitigationINTEL CORP·Filed 2018·Granted Apr 25, 2023·5 cites·24 claims
- 0585US11809873B2Selective use of branch prediction hintsINTEL CORP·Filed 2020·Granted Nov 7, 2023·2 cites·20 claims
- 0681US9552169B2Apparatus and method for efficient memory renaming prediction using virtual registersINTEL CORP·Filed 2015·Granted Jan 24, 2017·4 cites·26 claims
- 0780US10521236B2Branch prediction based on coherence operations in processorsINTEL CORP·Filed 2018·Granted Dec 31, 2019·2 cites·20 claims
- 0879US2025053651A1Microarchitectural mechanisms for the prevention of side-channel attacks using a thread identification (tid) and a privilege level bitINTEL CORP·Filed 2024·Application pending·0 cites
- 0976US10579414B2Misprediction-triggered local history-based branch predictionINTEL CORP·Filed 2017·Granted Mar 3, 2020·2 cites·18 claims
- 1075US2024296051A1Apparatuses and methods for speculative execution side channel mitigationINTEL CORP·Filed 2024·Application pending·0 cites
- 1173US12282778B2Selective use of branch prediction hintsINTEL CORP·Filed 2023·Granted Apr 22, 2025·0 cites·20 claims
- 1273US10402263B2Accelerating memory fault resolution by performing fast re-fetchingINTEL CORP·Filed 2017·Granted Sep 3, 2019·1 cites·20 claims
- 1373US7814469B2Speculative multi-threading for instruction prefetch and/or trace pre-buildINTEL CORP·Filed 2003·Granted Oct 12, 2010·13 cites·20 claims
- 1472US12130915B2Microarchitectural mechanisms for the prevention of side-channel attacks using a thread identification (TID) and a privilege level bitINTEL CORP·Filed 2022·Granted Oct 29, 2024·0 cites·24 claims
- 1572US9015835B2Systems and methods for procedure return address verificationGERZON GIDEON·Filed 2013·Granted Apr 21, 2015·5 cites·20 claims
- 1671US10949208B2System, apparatus and method for context-based override of history-based branch predictionsINTEL CORP·Filed 2018·Granted Mar 16, 2021·1 cites·15 claims
- 1770US6988185B2Select-free dynamic instruction schedulingINTEL CORP·Filed 2002·Granted Jan 17, 2006·15 cites·38 claims
- 1864US11238155B2Microarchitectural mechanisms for the prevention of side-channel attacksINTEL CORP·Filed 2019·Granted Feb 1, 2022·0 cites·24 claims
- 1963US11886884B2Branch prediction based on coherence operations in processorsINTEL CORP·Filed 2019·Granted Jan 30, 2024·0 cites·21 claims
- 2061US7380111B2Out-of-order processing with predicate prediction and validation with correct RMW partial write new predicate register valuesINTEL CORP·Filed 2004·Granted May 27, 2008·6 cites·10 claims
- 2160US11150979B2Accelerating memory fault resolution by performing fast re-fetchingINTEL CORP·Filed 2019·Granted Oct 19, 2021·0 cites·20 claims
- 2257US11188342B2Apparatus and method for speculative conditional move operationINTEL CORP·Filed 2020·Granted Nov 30, 2021·0 cites·25 claims
- 2357US7143272B2Using computation histories to make predictionsINTEL CORP·Filed 2002·Granted Nov 28, 2006·6 cites·52 claims
- 2457US6668306B2Non-vital loadsINTEL CORP·Filed 2001·Granted Dec 23, 2003·5 cites·37 claims
- 2556US7624258B2Using computation histories to make predictionsINTEL CORP·Filed 2006·Granted Nov 24, 2009·1 cites·24 claims
- 2655US12423075B2Code prefetch instructionINTEL CORP·Filed 2020·Granted Sep 23, 2025·0 cites·17 claims
- 2753US11029953B2Branch prediction unit in service of short microcode flowsINTEL CORP·Filed 2019·Granted Jun 8, 2021·0 cites·20 claims
- 2852US12430135B2Device, method, and system to facilitate improved bandwidth of a branch prediction unitINTEL CORP·Filed 2021·Granted Sep 30, 2025·0 cites·20 claims
- 2952US11928472B2Branch prefetch mechanisms for mitigating frontend branch resteersINTEL CORP·Filed 2020·Granted Mar 12, 2024·0 cites·20 claims
- 3051US2024311151A1Device, method and system for prioritizing entries of an instruction fetch resourceINTEL CORP·Filed 2023·Application pending·0 cites
- 3150US10620961B2Apparatus and method for speculative conditional move operationINTEL CORP·Filed 2018·Granted Apr 14, 2020·0 cites·15 claims
- 3248US10095522B2Instruction and logic for register based hardware memory renamingINTEL CORP·Filed 2014·Granted Oct 9, 2018·0 cites·20 claims
- 3346US2021200550A1Loop exit predictorINTEL CORP·Filed 2019·Application pending·0 cites
- 3446US2023100693A1Prediction of next taken branches in a processorINTEL CORP·Filed 2021·Application pending·0 cites
- 3545US2006036837A1Prophet/critic hybrid predictorSTARK JARED W·Filed 2004·Application pending·0 cites
- 3644US2003126414A1Processing partial register writes in an out-of order processorFiled 2002·Application pending·0 cites
- 3743US2004250054A1Line prediction using return prediction informationFiled 2003·Application pending·0 cites
- 3843US2023409335A1Selective disable of history-based predictors on mode transitionsINTEL CORP·Filed 2022·Application pending·0 cites
- 3942US2004128448A1Apparatus for memory communication during runahead executionINTEL CORP·Filed 2002·Application pending·0 cites
- 4040US2018349144A1Method and apparatus for branch prediction utilizing primary and secondary branch predictorsINTEL CORP·Filed 2017·Application pending·0 cites
- 4139US2019213131A1Stream cacheSABBA ARIEL·Filed 2018·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →