Inventor · disambiguated record
Robert Brady Benware
Also filed as: BENWARE ROBERT · BENWARE ROBERT B · BENWARE ROBERT BRADY
20 granted patents·2 pending applications·87 citations·filing 2003–2017
93Inventor score
Top patents by PatentIndex Score
22 records- 0187US10234502B1Circuit defect diagnosis based on sink cell fault modelsMENTOR GRAPHICS CORP·Filed 2017·Granted Mar 19, 2019·3 cites·20 claims
- 0284US8607107B2Test access mechanism for diagnosis based on partitioining scan chainsCHENG WU-TUNG·Filed 2011·Granted Dec 10, 2013·5 cites·24 claims
- 0382US8930782B2Root cause distribution determination based on layout aware scan diagnosis resultsBENWARE ROBERT BRADY·Filed 2012·Granted Jan 6, 2015·8 cites·14 claims
- 0481US9443051B2Generating root cause candidates for yield analysisMENTOR GRAPHICS CORP·Filed 2013·Granted Sep 13, 2016·6 cites·15 claims
- 0579US7617427B2Method and apparatus for detecting defects in integrated circuit die from stimulation of statistical outlier signaturesLSI CORP·Filed 2005·Granted Nov 10, 2009·7 cites·21 claims
- 0677US9378327B2Canonical forms of layout patternsMENTOR GRAPHICS CORP·Filed 2014·Granted Jun 28, 2016·4 cites·18 claims
- 0776US6972592B2Self-timed scan circuit for ASIC fault testingLSI LOGIC CORP·Filed 2003·Granted Dec 6, 2005·19 cites·8 claims
- 0871US9244125B2Dynamic design partitioning for scan chain diagnosisMENTOR GRAPHICS CORP·Filed 2013·Granted Jan 26, 2016·2 cites·15 claims
- 0969US9336107B2Dynamic design partitioning for diagnosisMENTOR GRAPHICS CORP·Filed 2012·Granted May 10, 2016·2 cites·19 claims
- 1065US9026874B2Test access mechanism for diagnosis based on partitioning scan chainsMENTOR GRAPHICS CORP·Filed 2013·Granted May 5, 2015·1 cites·24 claims
- 1165US7058909B2Method of generating an efficient stuck-at fault and transition delay fault truncated scan test pattern for an integrated circuit designLSI LOGIC CORP·Filed 2003·Granted Jun 6, 2006·12 cites·16 claims
- 1264US8707232B2Fault diagnosis based on design partitioningTANG HUAXING·Filed 2012·Granted Apr 22, 2014·2 cites·20 claims
- 1361US10198548B2Identifying the defective layer of a yield excursion through the statistical analysis of scan diagnosis resultsSHARMA MANISH·Filed 2009·Granted Feb 5, 2019·2 cites·18 claims
- 1458US7216280B2Method of generating test patterns to efficiently screen inline resistance delay defects in complex ASICsLSI LOGIC CORP·Filed 2004·Granted May 8, 2007·5 cites·7 claims
- 1553US10496779B2Generating root cause candidates for yield analysisMENTOR GRAPHICS CORP·Filed 2016·Granted Dec 3, 2019·0 cites·20 claims
- 1652US9857421B2Dynamic design partitioning for diagnosisMENTOR GRAPHICS CORP·Filed 2016·Granted Jan 2, 2018·0 cites·14 claims
- 1752US6954705B2Method of screening defects using low voltage IDDQ measurementLSI LOGIC CORP·Filed 2003·Granted Oct 11, 2005·5 cites·16 claims
- 1851US7395478B2Method of generating test patterns to efficiently screen inline resistance delay defects in complex asicsLSI CORP·Filed 2007·Granted Jul 1, 2008·0 cites·7 claims
- 1948US7079963B2Modified binary search for optimizing efficiency of data collection timeLSI LOGIC CORP·Filed 2003·Granted Jul 18, 2006·3 cites·20 claims
- 2043US2008052029A1Unique binary identifier using existing state elementsLSI LOGIC CORP·Filed 2006·Application pending·0 cites
- 2136US7171638B2Methods of screening ASIC defects using independent component analysis of quiescent current measurementsLSI LOGIC CORP·Filed 2004·Granted Jan 30, 2007·1 cites·10 claims
- 2236US2015234978A1Cell Internal Defect DiagnosisMENTOR GRAPHICS CORP·Filed 2015·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →