Inventor · disambiguated record
Michael Kugel
Also filed as: KUGEL MICHAEL · KUGEL MICHAEL B · KUGEL MICHAEL BERTHOLD
25 granted patents·2 pending applications·36 citations·filing 2008–2022
93Inventor score
Top patents by PatentIndex Score
27 records- 0188US9589604B1Single ended bitline current sense amplifier for SRAM applicationsIBM·Filed 2015·Granted Mar 7, 2017·11 cites·21 claims
- 0287US9431096B1Hierarchical negative bitline boost write assist for SRAM memory devicesIBM·Filed 2015·Granted Aug 30, 2016·10 cites·13 claims
- 0382US9761286B2Current-mode sense amplifierIBM·Filed 2016·Granted Sep 12, 2017·4 cites·18 claims
- 0473US10096346B2Current-mode sense amplifierIBM·Filed 2017·Granted Oct 9, 2018·2 cites·20 claims
- 0572US8918749B2Integrated circuit schematics having imbedded scaling information for generating a design instanceIBM·Filed 2013·Granted Dec 23, 2014·3 cites·6 claims
- 0660US11881853B2True complement dynamic circuit and method for combining binary dataIBM·Filed 2022·Granted Jan 23, 2024·0 cites·24 claims
- 0759US7913136B2Method for performing a logic built-in-self-test in an electronic circuitIBM·Filed 2008·Granted Mar 22, 2011·3 cites·18 claims
- 0858US8587990B2Global bit line restore by most significant bit of an address lineCHAN YUEN H·Filed 2011·Granted Nov 19, 2013·2 cites·15 claims
- 0957US9704567B1Stressing and testing semiconductor memory cellsIBM·Filed 2016·Granted Jul 11, 2017·1 cites·17 claims
- 1052US11043938B2Digital logic circuit for deterring race violations at an array test control boundary using an inverted array clock signal featureIBM·Filed 2019·Granted Jun 22, 2021·0 cites·19 claims
- 1152US10529388B2Current-mode sense amplifierIBM·Filed 2018·Granted Jan 7, 2020·0 cites·18 claims
- 1247US10367481B2Digital logic circuit for deterring race violations at an array test control boundary using an inverted array clock signal featureIBM·Filed 2018·Granted Jul 30, 2019·0 cites·1 claims
- 1347US9552851B2Current-mode sense amplifierIBM·Filed 2015·Granted Jan 24, 2017·0 cites·14 claims
- 1446US10587248B2Digital logic circuit for deterring race violations at an array test control boundary using an inverted array clock signal featureIBM·Filed 2017·Granted Mar 10, 2020·0 cites·19 claims
- 1545US9837142B1Automated stressing and testing of semiconductor memory cellsIBM·Filed 2016·Granted Dec 5, 2017·0 cites·9 claims
- 1645US9805823B1Automated stressing and testing of semiconductor memory cellsIBM·Filed 2017·Granted Oct 31, 2017·0 cites·8 claims
- 1745US9627090B1RAM at speed flexible timing and setup controlIBM·Filed 2015·Granted Apr 18, 2017·0 cites·8 claims
- 1843US11574695B1Logic built-in self-test of an electronic circuitIBM·Filed 2021·Granted Feb 7, 2023·0 cites·20 claims
- 1941US9627017B1RAM at speed flexible timing and setup controlIBM·Filed 2015·Granted Apr 18, 2017·0 cites·12 claims
- 2040US9767872B2Current-mode sense amplifier and reference current circuitryIBM·Filed 2016·Granted Sep 19, 2017·0 cites·15 claims
- 2139US9564188B2Current-mode sense amplifier and reference current circuitryIBM·Filed 2015·Granted Feb 7, 2017·0 cites·15 claims
- 2238US9384823B2SRAM array comprising multiple cell coresIBM·Filed 2014·Granted Jul 5, 2016·0 cites·18 claims
- 2338US8942052B2Complementary metal-oxide-semiconductor (CMOS) min/max voltage circuit for switching between multiple voltagesIBM·Filed 2012·Granted Jan 27, 2015·0 cites·24 claims
- 2436US8837235B1Local evaluation circuit for static random-access memoryIBM·Filed 2013·Granted Sep 16, 2014·0 cites·20 claims
- 2533US9595304B1Current-mode sense amplifierIBM·Filed 2015·Granted Mar 14, 2017·0 cites·15 claims
- 2632US2011317478A1Method and Circuit Arrangement for Performing a Write Through Operation, and SRAM Array With Write Through CapabilityCHAN YUEN H·Filed 2011·Application pending·0 cites
- 2731US2011310680A1Interleave Memory Array ArrangementCHAN YUEN H·Filed 2010·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →