Inventor · disambiguated record
Benoit Welterlen
Also filed as: WELTERLEN BENOIT · WELTERLEN BENOÎT
8 granted patents·2 pending applications·3 citations·filing 2010–2018
74Inventor score
Top patents by PatentIndex Score
10 records- 0169US11249868B2Method of fault management in a network of nodes and associated part of network of nodesBULL SAS·Filed 2018·Granted Feb 15, 2022·2 cites·20 claims
- 0258US10025633B2Method for optimizing memory access in a microprocessor including several logic cores upon resumption of executing an application, and computer implementing such a methodCOUVEE PHILIPPE·Filed 2011·Granted Jul 17, 2018·1 cites·15 claims
- 0353US10838768B2Method for optimizing memory access in a microprocessor including several logic cores upon resumption of executing an application, and computer implementing such a methodBULL SAS·Filed 2018·Granted Nov 17, 2020·0 cites·10 claims
- 0446US2018267829A1Method for configuring an it system, corresponding computer program and it systemBULL SAS·Filed 2018·Application pending·0 cites
- 0534US10007553B2Method for configuring an it system, corresponding computer program and it systemBRU XAVIER·Filed 2011·Granted Jun 26, 2018·0 cites·9 claims
- 0633US2015161062A1Method, device and computer program for dynamic control of memory access distances in a numa type systemMENYHART ZOLTAN·Filed 2013·Application pending·0 cites
- 0731US9632798B2Method and device for optimizing loading and booting of an operating system in a computer system via a communication networkTEMPORELLI FREDERIC·Filed 2011·Granted Apr 25, 2017·0 cites·16 claims
- 0828US10491564B2Process for assigning a network address to a terminal network-element, network, interconnection network-element, addressing server and associated terminal network-elementBULL SAS·Filed 2015·Granted Nov 26, 2019·0 cites·18 claims
- 0928US8966483B2Method and device for optimizing execution of software applications in a multiprocessor architecture comprising several input/output controllers and secondary computing unitsDERR SIMON·Filed 2010·Granted Feb 24, 2015·0 cites·10 claims
- 1026US9910474B2Method for optimizing management of standby of a microprocessor enabling the implementation of several logical cores and computer program implementing such a methodBRU XAVIER·Filed 2011·Granted Mar 6, 2018·0 cites·10 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →