Inventor · disambiguated record
Sherman H. Yip
Also filed as: YIP SHERMAN H
23 granted patents·2 pending applications·426 citations·filing 2003–2010
96Inventor score
Top patents by PatentIndex Score
25 records- 0197US7461208B1Circuitry and method for accessing an associative cache with parallel determination of data and data availabilitySUN MICROSYSTEMS INC·Filed 2005·Granted Dec 2, 2008·78 cites·20 claims
- 0296US8041900B2Method and apparatus for improving transactional memory commit latencyORACLE AMERICA INC·Filed 2008·Granted Oct 18, 2011·63 cites·20 claims
- 0396US7617421B2Method and apparatus for reporting failure conditions during transactional executionSUN MICROSYSTEMS INC·Filed 2006·Granted Nov 10, 2009·60 cites·18 claims
- 0495US8327188B2Hardware transactional memory acceleration through multiple failure recoveryKARLSSON MARTIN R·Filed 2009·Granted Dec 4, 2012·64 cites·11 claims
- 0594US8984264B2Precise data return handling in speculative processorsKARLSSON MARTIN R·Filed 2010·Granted Mar 17, 2015·33 cites·20 claims
- 0694US7480787B1Method and structure for pipelining of SIMD conditional movesSUN MICROSYSTEMS INC·Filed 2006·Granted Jan 20, 2009·39 cites·14 claims
- 0778US8732438B2Anti-prefetch instructionCAPRIOLI PAUL·Filed 2008·Granted May 20, 2014·9 cites·20 claims
- 0878US7293163B2Method and apparatus for dynamically adjusting the aggressiveness of an execute-ahead processor to hide memory latencySUN MICROSYSTEMS INC·Filed 2004·Granted Nov 6, 2007·25 cites·18 claims
- 0971US9086889B2Reducing pipeline restart penaltyKARLSSON MARTIN·Filed 2010·Granted Jul 21, 2015·3 cites·21 claims
- 1071US7610474B2Mechanism for hardware tracking of return address after tail call elimination of return-type instructionSUN MICROSYSTEMS INC·Filed 2006·Granted Oct 27, 2009·5 cites·20 claims
- 1169US7418581B2Method and apparatus for sampling instructions on a processor that supports speculative executionSUN MICROSYSTEMS INC·Filed 2006·Granted Aug 26, 2008·4 cites·17 claims
- 1268US8364900B2Pseudo-LRU cache line replacement for a high-speed cacheORACLE AMERICA INC·Filed 2008·Granted Jan 29, 2013·4 cites·19 claims
- 1366US8688963B2Checkpoint allocation in a speculative processorCHAUDHRY SHAILENDER·Filed 2010·Granted Apr 1, 2014·2 cites·20 claims
- 1466US7757068B2Method and apparatus for measuring performance during speculative executionORACLE AMERICA INC·Filed 2007·Granted Jul 13, 2010·3 cites·21 claims
- 1566US7650487B2Method and structure for coordinating instruction execution in out-of-order processor execution using an instruction including an artificial register dependencySUN MICROSYSTEMS INC·Filed 2006·Granted Jan 19, 2010·3 cites·25 claims
- 1666US7331039B1Method for graphically displaying hardware performance simulatorsSUN MICROSYSTEMS INC·Filed 2003·Granted Feb 12, 2008·20 cites·24 claims
- 1762US7716457B2Method and apparatus for counting instructions during speculative executionORACLE AMERICA INC·Filed 2007·Granted May 11, 2010·2 cites·15 claims
- 1862US7634639B2Avoiding live-lock in a processor that supports speculative executionSUN MICROSYSTEMS INC·Filed 2005·Granted Dec 15, 2009·3 cites·20 claims
- 1961US8065485B2Method and apparatus for determining cache storage locations based on latency requirementsLEVINSKY GIDEON N·Filed 2009·Granted Nov 22, 2011·2 cites·20 claims
- 2061US7257700B2Avoiding register RAW hazards when returning from speculative executionSUN MICROSYSTEMS INC·Filed 2005·Granted Aug 14, 2007·2 cites·19 claims
- 2159US8181002B1Merging checkpoints in an execute-ahead processorYIP SHERMAN H·Filed 2007·Granted May 15, 2012·2 cites·17 claims
- 2246US8316366B2Facilitating transactional execution in a processor that supports simultaneous speculative threadingYIP SHERMAN H·Filed 2008·Granted Nov 20, 2012·0 cites·22 claims
- 2342US8572356B2Space-efficient mechanism to support additional scouting in a processor using checkpointsYIP SHERMAN H·Filed 2010·Granted Oct 29, 2013·0 cites·20 claims
- 2442US2006168432A1Branch prediction accuracy in a processor that supports speculative executionCAPRIOLI PAUL·Filed 2005·Application pending·0 cites
- 2540US2011179254A1Limiting speculative instruction fetching in a processorSUN MICROSYSTEMS INC·Filed 2010·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →